Hitachi, Ltd.

Renesas Technology Corp.

Renesas Electronics Corporation

Hitachi Ulsi Systems Co., Ltd.

Hitachi Medical Corporation

Other

Hitachi Displays, Ltd.

Hitachi Device Engineering Co., Ltd.

Toshiyuki Mine

Takashi Kobayashi

Jiro Yugami

Tomoyuki Ishii

Natsuki Yokoyama

Yasuhiro Shimamoto

Hirotaka Hamamura

Kazuo Yano

Nozomu Matsuzaki

Masataka Kato

Tetsuo Adachi

Yoshimi Sudou

Digh Hisamoto

Shimpei Tsujikawa

Toshiaki Sano

Masahiro Ushiyama

Itaru Yanagi

Yasushi Goto

Akio Shima

Toshiaki Nishimoto

Keiji Watanabe

Kan Yasui

Shinichi Saito

Koichi Seki

Daisuke Ryuzaki

Masaharu Kinoshita

Kiyoo Itoh

Kenichi Takeda

Takashi Azuma

Yoshitaka Sasago

Shuntaro Machida

Tetsuya Ishimaru

Tatsuya Nagata

Hideo Sunami

Ken Yamaguchi

Toshikazu Shimada

Kazuo Nakazato

Hiroshi Mizuta

Tsuyoshi Yamauchi

Tatsuya Teshima

Norifumi Kameshiro

Toshiakl Nishimoto

Hiroshi Fukuda

Hitoshi Kume

Satoru Hanzawa

Takashi Hashimoto

Hiroyasu Shichi

Shinichiro Umemura

Norikatsu Takaura

Kenzo Kurotsuchi

Ryuta Tsuchiya

Kenji Hinode

Masatoshi Morishita

Takahiro Morikawa

Tsuyoshi Arigane

Yuudai Kamada

Hideo Miura

Hiroyuki Uchiyama

Tsuyoshi Ishikawa

Norio Suzuki

Kenji Takahashi

Hiraku Chakihara

Hideyuki Matsuoka

Satoru Akiyama

Tokuo Kure

Naoki Yamamoto

Akio Nishida

Hiroshi Miki

Yoshitaka Tadaki

Hideaki Kurata

Shin-ichiro Umemura

Atsushi Hiraiwa

Yoichi Tamaki

Shinpei Iijima

Yuki Mori

Toshinori Imai

Kazuyoshi Torii

Koichi Toba

Kazuo Ono

Mitsuharu Tai

Tsuyoshi Fujiwara

Osamu Kasahara

Takahiro Onai

Yuzuru Ohji

Koji Fujisaki

Kikuo Kusukawa

ShinIchiro Kimura

Mieko Matsumura

Misuzu Sagawa

Takahiro Kumauchi

Toshiyuki Kikuchi

Tadashi Arai

Makoto Miura

Hiroko Kaneko

Taiichi Takezaki

Seong-Kee Park

Yasunobu Aoki

Tomoko Sekiguchi

Yutaka Okuyama

A semiconductor device includes an active region famed in a semiconductor layer formed on an insulating film famed in a semiconductor substrate and having a first extension portion extending in a first direction and a second extension portion extending in a second direction intersecting with the first direction, a first diffusion layer electrode of a first conductivity type provided in the first extension portion, second and third diffusion layer electrodes of a second conductivity type provided in the second extension portion so as to interpose a first connecting portion connecting the first extension portion and the second extension portion, a first gate electrode famed on the first extension portion between the first diffusion layer electrode and the first connecting portion through an insulating film famed on the semiconductor layer, and a second gate electrode famed on the first connecting portion through the insulating film famed on the semiconductor layer.

Semiconductor device comprising plurality of diffusion layer electrodes with different conductivities and gate electrodes

A water leakage position estimation system(S) configured to estimate a water leakage position in a pipe network including a plurality of pipe routes includes a water leakage determination unit () and an estimation unit (). The water leakage determination unit () determines whether a water leakage occurs in the pipe network based on a measured value of a vibration related to the pipe network that is acquired by a water leakage sensor () provided in the pipe network. The estimation unit () estimates, when the water leakage determination unit () determines that a water leakage occurs in the pipe network, a pipe route in which the water leakage occurs from the plurality of pipe routes based on the measured value and a predicted value of the vibration for each pipe route acquirable by the water leakage sensor () when a water leakage occurs in each pipe route.

Water leakage position estimation system, water leakage position estimation method, and water leakage position estimation program

A water leak sensing system includes: a plurality of sensor terminals including a sensor installed in a pipeline of a water supply network; and a computer that senses a water leak from the pipeline based on detection signal data of the plurality of sensors of the plurality of sensor terminals, and outputs a result. The pipeline is either a first pipeline not covered by a pipe covering member (PE sleeve) or a second pipeline covered by the pipe covering member. The sensor can detect a signal at a first distance from a water leak point when the water leak occurs in the first pipeline, and detect a signal at a second distance, longer than the first distance, from the water leak point when the water leak occurs in the second pipeline.

Water leak sensing system and method

A redeposited material is removed so as to electrically observe a microelement without causing foreign matters or metal contamination. An FIB device (charged particle beam device) includes an FIB barrel which discharges the focused ion beam (charged particle beam), a stage which holds a sample (substrate), a microcurrent measuring device (current measuring unit) which measures a leakage current from the sample, and a timer (time measuring unit) which measures a time to emit the focused ion beam and a time to measure the leakage current. Further, the FIB device includes a system control unit (control unit) which synchronizes a time to emit the focused ion beam and a time to measure the leakage current by the microcurrent measuring device.

Sensor characteristic evaluation method and charged particle beam device

The invention is to reduce non-uniformity of a processing shape over a wide range of a single field-of-view. The invention is directed to a method of processing micro electro mechanical systems with a first step and a second step in a processing apparatus including an irradiation unit that irradiates a sample with a charged particle beam, a shape measuring unit that measures a shape of the sample, and a control unit. In the first step, the irradiation unit irradiates a plurality of single field-of-view points with the charged particle beam in a first region of the sample, the shape measuring unit measures the shape of a spot hole formed in the first region of the sample, and the control unit sets, based on measurement results of the shape of the spot hole, a scan condition of the charged particle beam or a forming mask of the charged particle beam at each of the single field-of-view points. In the second step, the irradiation unit irradiates, based on the scan condition or the forming mask set in the first step, a second region of the sample with the charged particle beam.

Micro-electro-mechanical-systems processing method, and micro-electro-mechanical-systems processing apparatus

The present invention is directed to a technique for correcting processing positional deviation and processing size deviation during processing by a focused ion beam device. A focused ion beam device control method includes forming a first processed figure on the surface of a specimen through the application of a focused ion beam in a first processing range of vision; determining the position of a next, second processing range of vision based on the outer dimension of the first processed figure; and moving a stage to the position of the second processing range of vision thus determined. Further, the control method includes forming a second processed figure through the application of the focused ion beam in a second processing range of vision.

Control method and control program for focused ion beam device

In a non-volatile memory in which writing/erasing is performed by changing a total charge amount by injecting electrons and holes into a silicon nitride film serving as a charge accumulation layer, in order to realize a high efficiency of a hole injection from a gate electrode, the gate electrode of a memory cell comprises a laminated structure made of a plurality of polysilicon films with different impurity concentrations, for example, a two-layered structure comprising a p-type polysilicon film with a low impurity concentration and a p'-type polysilicon film with a high impurity concentration deposited thereon.

Semiconductor storage device and manufacturing method thereof

Provided is a technique of securing reliability of a gate insulating film, as much as in a Si power MOSFET, in a semiconductor device in which a semiconductor material having a larger band gap than silicon is used, and which is typified by, for example, an SiC power MOSFET. In order to achieve this object, in the in the SiC power MOSFET, the gate electrode GE is formed in contact with the gate insulating film GOX, and is formed of the polycrystalline silicon film PFhaving the thickness equal to or smaller than 200 nm, and the polycrystalline silicon film PFformed in contact with the polycrystalline silicon film PFand having any thickness.

Semiconductor device and method of manufacturing the same

The present invention is to cause high channel mobility and a high threshold voltage to coexist in a SiC-MOSFET power device which uses a SiC substrate. The SiC MOSFET which is provided with a layered insulation film having electric charge trap characteristics on a gate insulation film has an irregular threshold voltage in a channel length direction of the SiC MOSFET, and in particular, has a shorter area having a maximum threshold voltage in the channel length direction compared to an area having other threshold voltages.

MOS field effect transistor

In a SiC-MOSFET power device for which a SiC substrate is used, a laminated insulating film having a charge-trapping characteristic is employed as a gate insulating film of the SiC-DiMOSFET, and charges are injected into the laminated insulating film, thereby suppressing a change in the gate threshold voltage.

Field effect silicon carbide transistor

In a non-volatile memory, writing/erasing is performed by changing a total charge amount by injecting electrons and holes into a silicon nitride film, which serves as a charge accumulation layer. The gate electrode of a memory cell has a laminated structure made of a plurality of polysilicon films with different impurity concentrations. In a two-layered structure the gate electrode has a p-type polysilicon film with a low impurity concentration and a p-type polysilicon film with a high impurity concentration deposited thereon. Holes are injected into the charge accumulation layer from the gate electrode.

In the existent method for manufacturing a solar cell, manufacture of a solar cell having a quantum well having a crystalline well layer and capable of controlling the thickness of the well layer was difficult. A quantum well having an amorphous well layer, comprising a barrier layer and an amorphous well layer is formed and then the quantum well having the amorphous well layer is annealed thereby crystallizing the amorphous well layer to form a quantum well having a crystalline well layer. By applying energy density applied to the amorphous well layer at an energy density of 1.26 J/mmor more and 28.8 J/mmor less, the crystalline well layer can be formed and the lamination structure of the quantum well can be maintained simultaneously.

Method for manufacturing a solar cell

In an ultrasonic transducer comprising a first electrode, a first insulating film disposed on the first electrode, a hollow part provided above the first insulating film and disposed between surfaces above and below the hollow part, a second insulating film disposed above the hollow part, and a second electrode disposed on the second insulating film, a first conductive film disposed on a side of the surface below the hollow part and a second conductive film disposed on a side of the surface above the hollow part are provided, the first conductive film and the second conductive film are disposed so that they overlap with a region in which the surfaces above and below the hollow part contact with each other as seen from above when the transducer is driven, and they do not overlap with each other in the region as seen from above.

Ultrasonic transducer and ultrasonic diagnostic device using same

A technique used for a semiconductor device formed by stacking multiple structural bodies each having a semiconductor device, for preventing generation of thermal load on a structural body at a lower layer which is caused by a laser used in a step of forming a structural body at an upper layer. In a phase-change memory including multiple stacked memory matrices, a metal film is disposed between a memory matrix at a lower layer and a memory matrix at an upper layer formed over the memory matrix at the lower layer, in which the laser used for forming the memory matrix is reflected at the metal film and prevented from transmitting the metal film, thereby preventing the phase-change material layer, etc. in the memory matrix at the lower layer from being directly heated excessively by the laser.

Semiconductor device having stacked structural bodies and method for manufacturing the same

There is provided a semiconductor storage device which is capable of further reducing a size of a memory cell, and increasing a storage capacity. Plural memory cells each including a transistor formed on a semiconductor substrate, and a variable resistive device having a resistance value changed by voltage supply and connected between source and drain terminals of the transistor are arranged longitudinally and in an array to configure a three-dimensional memory cell array. A memory cell structure has a double channel structure in which an inside of a switching transistor is filled with a variable resistance element, particularly, a phase change material. The switching transistor is turned off by application of a voltage to increase a channel resistance so that a current flows in the internal phase change material to operate the memory.

Semiconductor storage device

Growing community of inventors

Fussa, Japan

Toshiyuki Mine