Nec Corporation

Elpida Memory, Inc.

Kabushiki Kaisha Toshiba

Intermolecular, Inc.

Tokyo Electron Limited

Ps4 Luxco S.a.r.l.

Nec Electronics Corporation

Dynabook Inc.

Toshiba Client Solutions Co., Ltd.

Longitude Semiconductor S.a.r.l.

Toshiyuki Hirota

Hanhong Chen

Takakazu Kiyomura

Shuji Fujiwara

Fumiki Aiso

Pragati Kumar

Sunil Shanker

Xiangxin Rui

Hirohito Watanabe

Masao Teshima

Satoshi Mizoguchi

Hiroshi Shimasaki

Masanobu Zenke

Anwar Sathath

Shingo Koide

Sandra Guy Malhotra

Yoshiaki Yamamoto

Hiroyuki Ode

Wim Deweerd

Shingo Hishiya

Yuichiro Morozumi

Tomomi Murayama

Tomofumi Miyamoto

Hikaru Hirata

Kazuhiro Nakamura

Yumiko Kawano

Kentaro Tomioka

Shinji Nakagawa

Takashi Ogawa

Akinobu Kakimoto

Natsuki Sato

Hiroyuki Kusaka

Takuya Sugawara

Hiroyuki Minaguchi

Hiroyuki Hotta

Koji Akiyama

Kenji Okamura

Hiroshi Nakamura

Hironori Motoe

Kazuhiro Takeda

Susumu Arima

Ichiro Honma

Tomokazu Yuasa

Fumiki Aisou

Kazuki Yokota

Noriyasu Kawamura

Kazuya Fukushima

Masami Tanioku

Fumihide Sato

Ichirou Honma

Takeshi Iwata

Shogo Maeshima

Nobuyuki Yamanishi

Yusuke Sugiura

Kiyotaka Sakamoto

Norishiro Komatsu

Takehiro Hori

Shigeki Nishiyama

Tomomi Kurokawa

According to one embodiment, an electronic device includes a housing including a shield region, and a non-shield region formed of a dielectric, a part of the shield region is formed of a conductor, an antenna in the non-shield region, a vibration generating member including a casing formed of a dielectric, the vibration generating member being in the housing such that a surface of a part of the casing in the shield region and another part of the casing in the non-shield region, and an elastic support member which is sandwiched between the housing and the part of the casing, the elastic support member having a conductive property.

Electronic device

The housing includes a first base portion and a second base portion which are conductive respectively. The first base portion and the second base portion are disposed in contact. The antenna element is connected to the antenna ground. The antenna ground is formed on the antenna board. The gasket is located between the first base portion and the antenna ground in a height direction of the housing, and is conductive. The fixing member fixes the second base portion and the antenna ground so that the second base portion and the antenna ground are electrically connectable to each other in a state where the gasket is in contact with the first base portion and the antenna ground.

Electronic apparatus

According to a notebook-sized personal computer of an embodiment, a base housing retains an arithmetic unit, an antenna having antenna elements, and covers. An LCD housing retains an LCD. Hinges rotatably couple the base housing and the LCD housing to each other. In the base housing, a pair of depression sections are formed by depressing both ends of one side thereof. In each of the pair of depression sections, an antenna element is accommodated. On the base housing, to end sections respectively adjacent to the pair of depression sections along the one side of the base housing, the hinges are respectively provided. The covers respectively accommodate each of the antenna elements, and are constituted of a material through which a radio wave is passed.

This semiconductor device according to the present invention includes a plurality of cylindrical lower electrodes aligned densely in a memory array region; a plate-like support which is contacted on the side surface of the cylindrical lower electrodes, and links to support the plurality of the cylindrical lower electrodes; a pore portion provided in the plate-like support; a dielectric film covering the entire surface of the cylindrical lower electrodes and the plate-like support in which the pore portion is formed; and an upper electrode formed on the surface of the dielectric film, wherein the boundary length of the part on the side surface of the cylindrical lower electrode which is exposed on the pore portion is shorter than the boundary length of the part on the side surface of the cylindrical lower electrode which is not exposed on the pore portion.

Semiconductor device and manufacturing method therefor

Information equipment according to an embodiment includes a display housing with a display unit, a first radio communication antenna disposed at an end part of the display housing, a second radio communication antenna using a frequency band adjacent to or overlapped with that of the first radio communication antenna, and a third radio communication antenna disposed at an end part between the first and the second radio communication antennas, and uses a frequency band not adjacent to nor overlapped with those of the first and the second radio communication antennas.

Information equipment with a plurality of radio communication antennas

A method for doping a dielectric material by pulsing a first dopant precursor, purging the non-adsorbed precursor, pulsing a second precursor, purging the non-adsorbed precursor, and pulsing a oxidant to form an intermixed layer of two (or more) metal oxide dielectric dopant materials. The method may also be used to form a blocking layer between a bulk dielectric layer and a second electrode layer. The method improves the control of the composition and the control of the uniformity of the dopants throughout the thickness of the doped dielectric material.

Adsorption site blocking method for co-doping ALD films

This disclosure provides a method of fabricating a semiconductor stack and associated device, such as a capacitor and DRAM cell. In particular, a bottom electrode has a material selected for lattice matching characteristics. This material may be created from a relatively inexpensive metal oxide which is processed to adopt a conductive, but difficult-to-produce oxide state, with specific crystalline form; to provide one example, specific materials are disclosed that are compatible with the growth of rutile phase titanium dioxide (TiO) for use as a dielectric, thereby leading to predictable and reproducible higher dielectric constant and lower effective oxide thickness and, thus, greater part density at lower cost.

Inexpensive electrode materials to facilitate rutile phase titanium oxide

A method of manufacturing a semiconductor device, includes: forming a first and second interconnect trenches adjacent to each other in an interlayer insulating film; providing a first interconnect and a space thereon within the first interconnect trench, and a second interconnect and a space thereon within the second interconnect trench; forming a first trench larger in width from the first interconnect trench and a second trench larger in width from the second interconnect trench, by conducting isotropic-etching; and forming a first insulating film within the first trench and a second insulating film within the second trench by filling an insulating material in the first trench and the second trench.

Semiconductor device manufacturing method

The object of the present invention is to embed an insulating film in a hole having a high aspect ratio and a small width without the occurrence of a void. The thickness of a polishing stopper layer is reduced by making separate layers respectively serve as a mask during forming the hole in a semiconductor substrate, and a stopper during removing the insulating film filled in the hole.

Semiconductor device manufacturing method having high aspect ratio insulating film

Semiconductor device

A method of forming a dielectric film including a zirconium oxide film includes: forming a zirconium oxide film on a substrate to be processed by supplying a zirconium material and an oxidant, the zirconium material including a Zr compound which includes a cyclopentadienyl ring in a structure, and forming a titanium oxide film on the zirconium oxide film by supplying a titanium material and an oxidant, the titanium material including a Ti compound which includes a cyclopentadienyl ring in a structure.

Film forming method, film forming apparatus, and storage medium

A film is formed so that the atomic numbers ratio of Sr to Ti, i.e., Sr/Ti, in the film is not less than 1.2 and not more than 3. The film is then annealed in an atmosphere containing not less than 0.001% and not more than 80% of Oat 500&#xb0; C. or above. An SrO film forming step or a TiO film forming step are repeated a plurality of times so that a sequence, in which a plurality of SrO film forming steps or/and a plurality of TiO film forming steps are performed continuously, is included. When Sr is oxidized after the adsorption of Sr, Oand HO are used as an oxidizing agent.

Method for Sr&#x2014;Ti&#x2014;O-based film formation

A method for manufacturing a semiconductor device includes at least forming a lower electrode comprising titanium nitride on a semiconductor substrate, forming a dielectric film comprising zirconium oxide as a primary constituent on the lower electrode, forming a first protective film comprising a titanium compound on the dielectric film, and forming an upper electrode comprising titanium nitride on the first protective film. The method can include a step of forming a second protective film on the lower electrode before the step of forming the dielectric film on the lower electrode.

Method for manufacturing semiconductor device

Growing community of inventors

Tokyo, Japan

Toshiyuki Hirota