Panasonic Corporation

Panasonic Intellectual Property Management Co., Ltd.

Matsushita Electric Industrial Co., Ltd.

Toshiya Noritake

Taro Katayama

Kazuo Fujimoto

Masayuki Kozuka

Yoshihiro Mori

Yoshiichiro Kashiwagi

Yasushi Uesaka

Toshiyuki Fukushima

Kazuhiko Kouno

Atsushi Ito

Toshihiro Miyoshi

Tadayoshi Okuda

Kunihiko Fujii

Manabu Yumine

Kazuhide Fujimoto

Kiyoaki Watanabe

Shin-ichi Saeki

Shin-Ichi Saeki

A reproducing method includes: an obtaining step of obtaining a high quality image and a first low quality image that are still images showing an identical scene, and conversion determination information; a first determining step of determining whether or not the display device can display the high quality image; a first reproducing step of reproducing the high quality image when the display device can display the high quality image; a second determining step of determining whether or not to generate a second low quality image by using the conversion determination information when the display device cannot display the high quality image; a second reproducing step of reproducing the first low quality image when it is determined not to generate the second low quality image; and a third reproducing step of generating the second low quality image from the high quality image and reproducing the second low quality image when it is determined to generate the second low quality image.

Reproduction method, creation method, reproduction device, creation device, and recording medium

A data processor according to the present invention plays back video and audio from a data stream including video data and audio data, each of which is provided with time information representing its presentation time. The processor includes: a stream acquiring section for acquiring a first data stream and a second data stream continuously; an inserting section for inserting boundary-setting dummy data between the data streams; an analyzing section, which detects the dummy data and associates identification information with the video and audio data of each data stream; a control section for controlling the respective output timings of video data and audio data by reference to the time information of the video data and the time information of the audio data that are associated with the same piece of identification information; and an output section.

Data processing device and data processing method

A video scan converter processes a video stream including a first coding unit, which has been obtained by encoding a pair of fields Nand Nthat has come from a first frame of film video, and a second coding unit, which has been obtained by encoding a pair of a field Nthat has also come from the first frame and a field Mthat has come from a second frame, not the first frame. The video scan converter includes: a decoder, which receives the video stream, decodes the first and second coding units, and sequentially outputs the data of the respective fields N, N, Nand M; and a scan converter, which generates a frame based on associated two of those fields that have been supplied from the decoder. In outputting a frame associated with the field N, the scan converter generates the frame based on the fields Nand Nwithout using the data of the field N

Video scan converter for performing interlaced to progressive scan conversion

Color difference signals of demodulated video are vertically filtered to be converted into 4:2:2 signals before subjected to OSD synthesis, after which those signals are once again vertically filtered as a sort of scaling to obtain the output resolution. As filtering is carried out in two stages, the frequency characteristic deteriorates. A video processor superimposes an OSD video signal on a 4:2:0 format video signal, and includes: a converting section for converting the OSD video signal into YUV signals; an OSD luminance signal scaling section for performing scaling on an OSD luminance signal included in the YUV signals; a luminance signal synthesizing section for synthesizing the scaled OSD luminance signal and the luminance signal of the 4:2:0 format video signal; an OSD color difference signal scaling section for performing scaling on OSD color difference signals included in the YUV signals; and a color difference signal synthesizing section for synthesizing the scaled OSD color difference signals and the color difference components of the 4:2:0 format video signal.

Video processing apparatus

A data processor includes: a dummy packet processing section, which makes a plurality of dummy packets, each having a dummy identifier, and generates a playback stream including the dummy packets at predetermined intervals; a detecting section for detecting any of the dummy identifiers by scanning the identifiers of the respective packets of the playback stream and then outputting a first detection signal upon detecting a first code, which specifies a data location of a first portion of a given content, and a second detection signal upon detecting a second code, which specifies a data location of a second portion thereof, respectively; a switch, which receives the playback stream and which selectively passes the content data representing the first portion of the content in accordance with the first and second detection signals; and a decoding section for playing back the first portion of the content based on the output of the switch.

Data processing device

Noise is prevented when decoding an audio stream not containing syncwords or CRC bits in the elementary stream. When decoding a current frame, the private header of the next frame is analyzed and the current frame is muted if the private header of the next frame is not valid. When there is a data discontinuity caused by editing, decoding resumes from the start address of the next frame determined.

Playback apparatus and playback method

The vertical sync signal generator includes: a vertical sync signal separation circuit for separating a vertical sync signal of an input luminance signal and outputting the separated signal as a first vertical sync signal; an automatic frequency control circuit for generating a second vertical sync signal having a repeat frequency corresponding with an average repeat frequency of the first vertical sync signal and outputting the generated signal; a vertical sync signal phase detection circuit for detecting whether or not the first vertical sync signal has two different periods repeated alternately and outputting the detection result as a decision signal; and a selector for receiving the first and second vertical sync signals, selecting the first vertical sync signal when the decision signal indicates that the first vertical sync signal has two different periods repeated alternately and otherwise selecting the second vertical sync signal and outputting the selected signal.

Vertical synchronizing signal generation apparatus and video signal processing apparatus

Growing community of inventors

Osaka, Japan

Toshiya Noritake