Sharp Kabushiki Kaisha Corporation

Toshiya Ishio

Hiroyuki Nakanishi

Katsunobu Mori

Shinji Suminoe

Yoshihide Iwazaki

Katsuyuki Tarui

Katsuji Iguchi

Nobuo Ogata

Hitoshi Aoki

Mitsuru Hineno

Yasuhiko Tanaka

Masumi Maegawa

Tomoyo Maruyama

Takamasa Tanaka

An image display device includes: a plurality of LED elements that are mounted on a drive circuit substrate and emit light source light; a wavelength conversion layer that is stacked on a side of the LED elements opposite to the drive circuit substrate, converts the light source light emitted by the LED elements into long wavelength light, and emits the long wavelength light to a side opposite to the drive circuit substrate; and a first functional layer that is disposed on a light emitting surface side of the long wavelength light of the wavelength conversion layer, reflects the light source light, and transmits the long wavelength light.

Image display device

A semiconductor chip stack includes a first semiconductor chip, a second semiconductor chip, and a connection via which the first electrode and the second electrode are electrically connected to each other. The connection includes a first column and a second column. The first column is constituted by a material having a higher degree of activity with respect to heat than a material that constitutes the second column and is smaller in volume than the second column. Further, the connection has an aspect ratio of 0.5 or higher in a height direction.

Semiconductor chip stack and method for manufacturing semiconductor chip stack

A light emitting element module with a high yield where a portion through which a substrate and a lens are bonded can be prevented from cracking and peeling due to thermal expansion is provided. A light emitting element part equipped with a light emitting element and an optical lens for diffusing light from the light emitting element are provided on a substrate in the light emitting element module, where the lens is fixed to the substrate with an adhesive resin having a tensile breaking elongation of 50% or more. The lens also has a plurality of supports and is fixed to the substrate through these supports, so that stress in the portion where the substrate and the lens are bonded can be dispersed between the supports, and a layer in which air can circulate so as to release heat is provided between the substrate and the lens.

Light emitting element module and manufacturing method thereof, and backlight apparatus

A surface-emission unit to prevent irregularity in brightness from being generated is provided. The surface-emission unit is composed of light-emission element parts each having a light-emission element, aligned and arranged on a substrate two-dimensionally, and optical lenses each arranged on the substrate with respect to each light-emission element part, to diffuse light from the light-emission element, and a support part to fix the optical lens onto the substrate is arranged so as not overlap a line connecting the light-emission element part corresponding to the optical lens fixed by the support part, to another light-emission element part adjacent to the light-emission element part.

Surface-emission unit and method for producing the same

A semiconductor device has a semiconductor chip provided with an insulating layer formed so as to be thinner in a first secondary-wire-free area than in a first secondary-wire-containing area. Further, the semiconductor chip has an edge extending further outward than a side wall, which severs as an edge of an upper insulating layer, in an extending direction of a circuit-forming surface of the semiconductor chip on which electrode pads are provided. This makes it possible to provide a semiconductor device capable of suppressing electromagnetic interference between a secondary wire and an electronic circuit of a semiconductor chip and the curvature of a wafer even in the case of overlap between the secondary wire and the electronic circuit, and of reducing the risk of occurrence of chipping in a dicing step.

Semiconductor device and method for manufacturing semiconductor device

A semiconductor device provided with a semiconductor chip wherein an electrode pad is formed on a circuit formation surface, includes a first passivation film, which serves as an adhering layer; a second passivation film formed on the first passivation film, for protecting the semiconductor chip from external physical damage; a metal film formed so as to cover at least a first electrode-pad opening section of the first passivation film; and an external connection terminal to connect the electrode pad to an external equipment. A second electrode-pad opening section of the second passivation film is formed so as to expose the first electrode-pad opening section entirely. The second passivation film is formed so as not to be in direct contact with the electrode pad.

Semiconductor device and method for manufacturing the same

A manufacturing method of a semiconductor device, comprising the steps of forming an insulation layer, which has an opening section in an area including an area on an electrode pad, on a top surface of the semiconductor substrate on which the electrode pad is formed; at least forming a first barrier metal layer, which becomes a part of a leading wiring layer, in an inner peripheral surface of the opening section including the top surface of the electrode pad; at least forming a main conductor layer, which becomes a part of the leading wiring layer, in an area surrounded by the first barrier metal layer in the opening section; eliminating an upper portion of the main conductor layer at least to a position at which the first barrier metal layer is exposed, and forming a second barrier metal layer, which becomes a part of the leading wiring layer, so as to cover the whole top surface of the main conductor layer.

Semiconductor device having a leading wiring layer

A leading wiring layer is provided with a main conductor layer, a first barrier metal layer for covering bottom and side surfaces of the main conductor layer, and a second barrier metal layer for covering a top surface of the main conductor layer. This ensures the respective barrier metal layers to cover entire surroundings including the side, bottom and top surfaces of the main conductor layer.

A semiconductor device includes (i) spacers between a first electronic component and a second electronic component facing each other, for keeping a distance between the first and second electronic components constant and (ii) combining parts for combining the first electronic component with the second electronic component. The spacers are made of liquid resin material made of thermosetting resin, and the combining parts are made of liquid conductive combining material including metal and thermosetting resin. A manufacturing method of the semiconductor device includes the steps of: forming the spacers on first electrode pads by hardening the liquid resin material; providing the liquid conductive combining material on either the first electrode pads or second electrode pads; aligning the first electronic component with the second electronic component so that (i) the spacers contact with the second electrode pads and (ii) the liquid conductive combining material contact with either at least a part of one the first electrode pads or at least part of one of the second electrode pads; and combining the first electronic component with the second electronic component by hardening the liquid conductive combining material. The steps above are carried out in this order.

Semiconductor device in which a plurality of electronic components are combined with each other

An integrated semiconductor circuit includes a semiconductor chip on which surface a plurality of connection electrodes are formed, a lower insulating layer covering the surface of the semiconductor chip such that the connection electrodes are exposed, a plurality of wiring portions formed on the lower insulating layer, each of the wiring portions being connected to the connection electrode at one end and provided with a component connection portion at the other end, an upper insulating layer covering the wiring portions such that the component connection portions are exposed, and an electronic component connected between different component connection portions.

Integrated semiconductor circuit including electronic component connected between different component connection portions

A semiconductor chip of the present invention is so arranged that a front face on which an element circuit is formed has electrode pads and a side face and a back face are coated with a shielding layer for shielding electromagnetic waves. With this, it is possible to provide a semiconductor element capable of being easily manufactured into a smaller semiconductor device compared with a conventional semiconductor device equipped with a shielding cap; a semiconductor device; and a method for manufacturing a semiconductor element.

Semiconductor element with electromagnetic shielding layer on back/side face(s) thereof

A manufacturing method of a semiconductor device for providing wires on a front surface of a semiconductor wafer by providing a plating layer, in which conductive layers provided on the front and back surfaces of the semiconductor wafer are electrically conducted by solder filled in its through-holes, and electrolytic plating is carried out by electrically connecting cathode terminals of an electrolytic plating apparatus and the conductive layer provided on the back surface of the semiconductor wafer which is provided with a mask on the conductive layer provided on its front surface.

Manufacturing method of semiconductor device

In order to simplify a providing method of a wiring that electrically connects a semiconductor integrated circuit to a substrate, the semiconductor integrated circuit that is covered with an insulating layer except for an electrode area having an electrode pad is fixed on a formation side of the substrate having a terminal connected to the semiconductor integrated circuit so that the electrode pad is exposed. Next, a metallic thin film is provided on a wiring area on which a wiring for electrically connecting the electrode pad to the terminal is provided. Further, the wiring is provided on the metallic film of the wiring area in accordance with plating.

Semiconductor device with plating wiring connecting IC electrode pad to terminal

The present invention provides a quality and reliable high-density package (Chip Size Package) semiconductor device without problems related to the manufacturing process. The semiconductor device includes the first semiconductor substrate piece having electrode pads formed on its principle surface, and a second semiconductor mounting piece mounted thereon via a first insulating film and a die-attaching material. On the surface opposite the first semiconductor substrate piece of the second semiconductor substrate piece, formed are wiring patterns and a second insulating film for protecting the wiring patterns. The wiring patterns include electrode pads, wires, and lands where external connection terminals are provided.

Semiconductor device and method of manufacturing same

A semiconductor integrated circuit device in accordance with the present invention is provided with first electrode pads, a first insulation layer and a second insulation layer. The first electrode pad are formed on the circuit formation face side of an IC chip. The first insulation layer is placed on areas other than the upper portions of the first electrode pads. The second insulation layer, which is made from a photosensitive material, is formed on the first insulation layer with an opening section for allowing at least one portion of the first electrode, the wire and at least one portion of the second electrode to be exposed. Here, the wire and the second electrode are formed by filling the opening section of the second insulation layer with particles of a conductive material. Thus, it is possible to provide a semiconductor integrated circuit device to which a fine wire processing technique is applied while maintaining the same functions as conventional devices at low costs, and a manufacturing method for such a device.

Growing community of inventors

Nabari, Japan

Toshiya Ishio