Nec Corporation

Toshiya Hayashi

Shuichi Saito

Kousuke Miyoshi

Naoharu Nishio

Kouji Hamada

Upon fabrication of semiconductor devices, a semiconductor substrate is subjected to ion implantation with high energy. Subsequent annealing of the ion-implanted semiconductor substrate, when conducted by heating the substrate to a temperature of from 1,000&deg; C. to 1,200&deg; C. at a ramp-up rate of at least 200&deg; C./sec, makes it possible to provide the resulting semiconductor devices with smaller leakage currents of reduced variations (&sgr;/X). The present invention can therefore provide a process for the fabrication of semiconductor devices featuring both smaller leakage currents and reduced variations of the leakage currents even when ion implantation is conducted with high energy.

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Tokyo, Japan

Toshiya Hayashi