Fujitsu Corporation

Fujitsu Display Technologies Corporation

Toshiro Katsube

Kenji Iida

Yasuhito Takahashi

Norikazu Ozaki

Yuichiro Ohta

Hiroyuki Katayama

Masaru Sumi

Yasunaga Kurokawa

Kazuo Nakano

Noriaki Furukawa

Tsukasa Adachi

Satoru Imai

Taiji Yuhara

An image display panel is prepared which has in an in-plane thereof an image display area for displaying an image and a framing area surrounding the image display area. Light shielding ink is supplied from an ink supply source to at least a partial surface area of the framing area of the image display panel. In this case, the ink supply source is made not in contact with the image display panel. Even if the frame structure of an image display device such as a liquid crystal display is made narrow, the image quality in a peripheral area of the image display area becomes hard to be lowered.

Display, its manufacture, ink coating apparatus, all suitable for narrowing display frame

A process for fabricating thin multi-layer circuit boards. A substrate is disposed over a heat-accumulating block adjacent thereto so that it is uniformly heated from the back side thereof during the pre-baking.

Process for fabricating a thin multi-layer circuit board

A thin multi-layer circuit board having alternately stacked wiring pattern layers, including a top wiring pattern layer and insulating layers on an insulating plate-like substrate. The wiring pattern layers are electronically connected through vias in the insulating layers to form a predetermined circuit pattern by said wiring pattern layers. A metallic barrier layer is formed on the top wiring pattern layer, except at an exclusion zone of the metallic barrier layer. An electronic part-mounting pad layer and a remodeling pad layer are formed on the metallic barrier layer. The remodeling pad layer is arranged adjacent the electronic part-mounting pad layer, with the exclusion zone therebetween.

Thin multi-layer circuit board having a remodeling pad layer and a metallic barrier layer with an exclusion zone

A process for fabricating thin multi-layer circuit boards which allow the electrical conduction of remodeling pads to be easily cut do not use etching for gold, avoid the lift-off method for forming a thin chromium film on the wiring pattern layer, allow a defective wiring pattern layer to be removed, and which uses uniform heating of the substrate, from the back side thereof, at the time of pre-baking. A barrier metal (60) is excluded from a portion where the electrical conduction of a remodeling pad (62b) is to be cut (FIGS. 1 to 16). Alternatively, gold-plating resist is formed in order to avoid the etching for gold (FIGS. 17 to 19). Alternatively, a thin chromium film is formed in advance by etching on the wiring pattern layer (FIGS. 27 to 33). Alternatively, a metallic barrier film (122) is formed on each of the wiring pattern layers so that the wiring pattern layer can be removed without affecting other wiring pattern layers (FIGS. 36 to 42). Alternatively, the substrate is disposed over a heat-accumulating block (138) adjacent thereto so that it is uniformly heated from the back side thereof during the pre-baking.

Thin multi-layer circuit board and process for fabricating the same

Growing community of inventors

Yonago, Japan

Toshiro Katsube