Kabushiki Kaisha Toyota Chuo Kenkyusho

Nidek Co., Ltd.

Toshio Murata

Takashi Suzuki

Yukihiro Higuchi

Tsutomu Uesugi

Tokio Ueno

Yasuhiro Furuuchi

Yukio Abe

Sachiko Kawaji

Hisanari Torii

Masayasu Ishiko

Hiroyoshi Nakanishi

Naoyuki Kondo

Seiji Taki

The MOS gate thyristor of the present invention has a p,type anode layer (first semiconductor layer), an n,type base region (second semiconductor layer) with the function of acting as a drift layer, a p,type base region (third semiconductor layer), and an n,type impurity diffusion layer (fourth semiconductor layer) with the function of acting as a source region. On the surface of the base region, an n,type floating emitter region (fifth semiconductor layer) is formed, while a first channel region (sixth semiconductor layer) is formed between the impurity diffusion layer and the floating emitter region. At the lower ends of the fourth semiconductor layer and the first channel region an insulation layer is formed. The insulation layer acts to suppress the operation of a parasitic thyristor to ensure a reliable turn-off operation of the transistor. A portion of the semiconductor extends from the n,type floating emitter region and lies underneath the insulation layer in the direction alongside the principal plane of the p,type anode layer. The extended semiconductor portion helps broaden the carrier injection path.

Semiconductor device

A MOSFET wherein the formation of a channel in a channel formation region is controlled by a voltage applied to an insulated gate, comprising: a semiconductor substrate; a first semiconductor layer (drain region) of a first conductivity type formed on a surface of the semiconductor substrate; a second semiconductor layer (body region) of a second conductivity type provided within the first semiconductor layer, where a part thereof forms the channel formation region; a third semiconductor layer (source region) of the first conductivity type provided selectively in the second semiconductor layer; and a body contact region in electrical contact with the second semiconductor layer. The body contact region is formed in an area that is separated from an active region by a non-active region. With this structure, parasitic bipolar transistors operate simultaneously throughout the entire device so that a uniform breakdown current is generated, thus preventing element destruction due to current concentrations.

Insulated-gate semiconductor device having a contact region in

Growing community of inventors

Aichi, Japan

Toshio Murata