Fujitsu Corporation

Fujitsu Media Devices Limited

Fujitsu Vlsi Limited

Fujitsu Ten Limited

Fujitsu Vsli Limited

Toshio Hanazawa

Yoshiaki Sano

Hiroshi Ishikawa

Masaaki Ono

Hiroshi Tokunaga

Takashi Matsumoto

Tsutomu Miyashita

Hideo Honda

Fumihiko Nakazawa

Chikara Tsuchiya

Masanori Yachi

Katsuyuki Yasukouchi

Fumihiko Sato

Kenji Nagata

Susumu Fujihara

Harumi Handa

Yukinori Fujimura

Eiji Ohya

Sachito Horiuchi

Yasuhide Katagase

Yoshiro Yoshino

The present invention provides the stress detection method for force sensor device with multiple axis sensor device and force sensor device employing this method, whose installation angle is arbitrary. The stress detection method includes, first and second force sensors whose detection axes are orthogonal to each other. When the detection axis of first force sensor forms angle &#x3b8; with direction of detected stress Ax, and the stress component of direction perpendicular to direction of the detected stress Ax is Az, output Apx of the axis direction of first force sensor is found as Apx=&#x3b1;(Ax&#xd7;cos &#x3b8;+Az&#xd7;sin &#x3b8;), and output Apz of the axis direction of the second force sensor is found as Apz=&#x3b1;(Ax&#xd7;sin &#x3b8;+Az&#xd7;cos &#x3b8;), and, when &#x3b1;and &#x3b1;are detection sensitivity coefficients of first and second force sensors respectively, the detection sensitivity coefficient &#x3b1;of second force sensor is set as &#x3b1;=&#x3b1;tan &#x3b8;, and the detected stress Ax is found as Ax=(Apx&#x2212;Apz)/&#x3b1;(cos &#x3b8;&#x2212;tan &#x3b8;&#xd7;sin &#x3b8;).

Stress detection method for force sensor device with multiple axis sensor and force sensor device employing this method

A detector is made up of a semiconductor integrated circuit in a part, and the semiconductor integrated circuit includes a driving circuit, an AC amplifier, a detection circuit and an amplifier circuit. An input resistor that is connected to input terminals of an operational amplifier includes an internal input resistor made up of a semiconductor integrated circuit element and an external input resistor made up of an external discrete component connected to each other in parallel. Temperature characteristics of an angular velocity sensor is compensated by a temperature coefficient (&#x3b1;) that is a combination of a temperature coefficient (&#x3b1;) of the internal input resistor and a temperature coefficient (&#x3b1;) of the external input resistor.

Sensor signal processing system and detector

Stress detection method for sensor device with multiple axis sensor and sensor device employing this method

An inertial sensor such as an acceleration sensor or gyro can have superior impact resistance by regulating displacement of a weight portion in the direction of an upper limit. The sensor includes a sensor portion that has a fixing part, a weight portion the height of which is a predetermined size shorter than that of the fixing part, and a beam portion that links the weight portion and the fixing part; a plate-like first stopper portion that covers the weight portion and is bonded to the fixing part with clearance of a predetermined size from the weight portion; and a flat, plate-like second stopper portion that is connected to the fixing part via a bump of a predetermined height on the side opposite the first stopper portion.

Inertial sensor

A semiconductor device comprises a substrate of a first conduction type defined by a major surface, a pair of conductive regions of a second conduction type formed in the substrate along the major surface, an intervening region of the first conduction type formed in the substrate between the pair of conductive regions so as to separate the pair of conductive regions from each other, a first insulator film provided on the substrate so as to cover the major surface thereof including the pair of conductive regions and the intervening region located therebetween, a first conductor layer provided so as to extend generally parallel to the major surface of the substrate with a separation from the first insulator film, the first conductor layer crossing a part of the intervening region at a level separated therefrom, a second conductor layer provided on the first insulator film at a level below the first conductor layer so as to cover at least the part of the intervening region which is crossed by the first conductor layer, a second insulator film interposed between the second conductor layer and the first conductor layer, and a circuit for applying a predetermined voltage to the second conductor layer, the predetermined voltage having a magnitude chosen such that turning-on of a parasitic MOS transistor formed in the semiconductor device is eliminated.

Lateral type semiconductor device having a structure for eliminating

A differential amplifier includes an input circuit outputting an input signal to be amplified, and a differential amplifier circuit having a first input terminal, a second input terminal, a first output terminal and a second output terminal. Complementary output signals are obtained at the first and second output terminals. An input bias circuit applies an input bias signal based on the input signal to the first input terminal of the differential amplifier circuit. A reference bias circuit applies a reference bias signal to the second input terminal of the differential amplifier circuit. A variation detecting circuit detects a variation in the input bias signal and generates a detection signal indicating a magnitude of the variation. A bias adjustment circuit adjusts the reference bias signal on the basis of the detection signal so that a difference between the input bias signal and the reference bias signal is always zero.

Differential amplifier having a bias stabilizing circuit

An output circuit comprises first and second transistors connected in series between a first voltage source and an second voltage source such that the first and second transistors are turned on and turned off respectively in response to an input logic signal and a logic inversion thereof, third and fourth transistors connected in series between a third voltage source and fourth voltage source such that the third and fourth transistors are turned on and turned off respectively in response to the logic inversion of the input logic signal and the input logic signal, first and second power transistors connected in series between a fifth voltage source and a sixth voltage source such that the first power transistor is turned on in response to the turning-on of the first transistor and turned off in response to the turning-on of the second transistor, the second power transistor is turned on in response to the turning-on of the third transistor and turned off in response to the turning-on of the fourth transistor, wherein there are provided a first drive control circuit for detecting the turning-on of the second power transistor and disabling the turning-on of the first transistor with a delay such that the turning-on of the first transistor is prohibited for a predetermined interval even after the second power transistor is turned on following a turned off state and a second drive control circuit for detecting the turning-on of the first power transistor and disabling the turning-on of the third transistor with a delay such that the turning-on of the third transistor is prohibited for a predetermined time interval even after the first power transistor is turned on following a turned off state.

Driver circuit for driving an analog device

An amplifier circuit comprises a variable gain amplifier for receiving an input signal which is to be amplified by the amplifier circuit with a variable gain. The variable gain is controlled by a control signal. The amplifier circuit also includes a constant gain amplifier for amplifying a signal outputted from the variable gain amplifier with a constant gain, and a gain control circuit responsive to a signal outputted from the constant gain amplifier so as to supply the control signal to the variable gain amplifier. The signal from the constant gain amplifier is outputted as an output signal of the amplifier circuit, and the gain control circuit generates the control signal during a time period in which a level of the output signal of the constant gain amplifier is higher than a reference level which is a predetermined value lower than a peak value of the output signal of the constant gain amplifier.

Amplifier circuit having gain control

A constant voltage source circuit which is provided with an output transistor (Q.sub.1) for outputting a predetermined output voltage (V.sub.0) in accordance with an input voltage (V.sub.IN) and a differential amplifier (A), and is further characterized in that the circuit further comprises a reference voltage control means which monitors variations of the input voltage (V.sub.IN) and outputs a predetermined constant voltage to the differential amplifier (A) as a reference voltage when the input voltage (V.sub.IN) is higher than, a predetermined voltage level, and a voltage varied in accordance with the variation of the input voltage (V.sub.IN) is output therefrom to the differential amplifier (A) as a reference voltage when the input voltage (V.sub.IN) falls below a predetermined voltage level.

Constant voltage source circuit

A BTL power amplifier comprises main and inverse amplifier units having the same constitution but producing outputs inverted from each other. A low impedance load is directly connected between the output ports of the main and inverse amplifier units. The present BTL power amplifier further comprises a first operation control circuit which activates only the main amplifier unit after the power switch is turned on, and a second operation control circuit which maintains the output port of the inverse amplifier unit in a floating state for a predetermined period of time after the activation of the main amplifier unit is begun. Thus, the present BTL power amplifier produces no pop noise when the power supply is initiated.

Audio-frequency power amplifier

A bias circuit for generating bias voltages or bias currents including first and second elements for generating a voltage corresponding to the sum of two voltage drops in a forward p-n junction; first and second transistors for generating a negative feedback current; at least one resistor for determining the value of a constant current for generating bias voltages; a negative feedback circuit; a third resistor connected in the feedback circuit, and; a starting element for supplying currents to the first and second elements and to the first and second transistors in an initial state when the power is turned on, whereby the feedback circuit operates to generate the constant current which is used for forming bias voltages.

Growing community of inventors

Kasugai, Japan

Toshio Hanazawa