Sony Semiconductor Solutions Corporation

Toshimasa Shimizu

Katsumi Takaoka

Chiaki Takano

Keita Izumi

Katsuyuki Tanaka

Naoki Yoshimochi

Yasushi Katayama

Hideki Takahashi

Hideki Awata

Kevin Fronczak

Suguru Houchi

Sotaro Ohara

John Steven Childs

Yutaka Takagi

Scott A Rogerson

Cody Cziesler

Hirotaka Murakami

Mark Pude

Robert James Childs

Robert Justin Jarnot

Yuki Takizawa

Gaku Hidai

An imaging device includes a controller, a power supply, a regulator, and a switch. The controller is configured to control an imaging unit, on the basis of a command and data that are received from a host in accordance with an I2C/I3C communication protocol. The power supply is configured to supply a voltage to a digital block of the controller. The digital block is configured to be subjected to dynamic voltage frequency scaling within one-frame operation. The regulator and the switch are provided between the digital block and the power supply, and coupled in parallel with each other.

Imaging device, imaging method, and electronic apparatus

An imaging device includes a controller and a generator. The controller controls an imaging unit on the basis of a command and data received from a host in accordance with an I2C/I3C communication protocol. The generator generates a second control signal indicating whether or not to apply intra-frame dynamic frequency scaling (DFS) or intra-frame dynamic voltage frequency scaling (DVFS) on the basis of a first control signal received from the host via a first route different from the I2C/I3C communication protocol, and outputs the second control signal to the host via a second route different from the I2C/I3C communication protocol.

It is desirable to reduce power consumption without reducing a function in an electronic apparatus operating in a plurality of modes different in power consumption from one another. A processor operates in a normal mode, in which power consumption is higher, of two modes different in power consumption from each other, and stops operation in a power saving mode, in which the power consumption is lower, of the two modes. A control section outputs a power saving mode control command instructing an increase or decrease of a supply electric power to a digital circuit different from the processor in the power saving mode. A power source managing integrated circuit increases or decreases the supply electric power to the digital circuit in accordance with the power saving mode control command, and outputs the increased or decreased supply electric power.

Electronic apparatus and method of controlling electronic apparatus

The present disclosure relates to a signal processing apparatus and method that enables to reduce required power. In the signal processing apparatus, a RTC of a main chip and a RTC of a power supply chip are synchronized before power supply of the main chip is stopped, and the RTC of the main chip is synchronized with the time of the RTC of the power supply chip after the power supply of the main chip is restored. In this way, the RTC uses continuous time information before and after the stop. The present disclosure is capable of being applied to, for example, a GPS module in which a digital circuit includes a plurality of chips.

Signal processing apparatus and method

Growing community of inventors

Kanagawa, Japan

Toshimasa Shimizu