Ricoh Company, Ltd.

Toshiki Yamanaka

Ryo Saito

Suguru Sangu

Katsuyuki Sakurano

Yuki Abe

A displacement measurement device includes: an irradiation unit that irradiates a measurement object with coherent light; a luminance-change coordinate point detection unit that detects a luminance-change coordinate point where a luminance change has occurred, based on light reflected from the measurement object, and outputs data related to the luminance-change coordinate point; and circuitry that calculates an amount of displacement of the measurement object, based on the data related to the luminance-change coordinate point, by performing computations of a first numerical sequence and a second numerical sequence. The first numerical sequence includes a set of first elements each representing a location of the luminance-change coordinate point extracted from the data. The second numerical-sequence includes a set of second elements each representing a location of the luminance-change coordinate point extracted from the data.

Displacement measurement device, non-contact input apparatus, and biological micromotion measurement apparatus

A light receiver includes a plurality of photoelectric conversion portions each of which includes a photoelectric conversion element configured to receive light, and a pulse generator configured to generate a pulse signal corresponding to an amount of light received by the photoelectric conversion element. The light receiver includes a plurality of bit counters each of which is configured to count the pulse signal of the pulse generator, and the plurality of bit counters are dispersed in the plurality photoelectric conversion portions.

Light receiver and ranging device

A disclosed SIMD microprocessor includes plural processor elements each having n arithmetic circuits and n registers configured to temporarily store data pieces to be input to the arithmetic circuits, n being a natural number equal to or greater than 2, and; a control circuit configured to determine an arrangement order of the processor elements and an arrangement order of the arithmetic circuits in the processor elements and determine whether to use the n arithmetic circuits as a single arithmetic circuit or as n arithmetic circuits. Each processor element further includes n shifter pairs each including a PE shifter and a bit shifter; and n shift data selection circuits configured to select arbitrary data pieces from the data pieces in the shifter pairs, perform bit extension on the data pieces, and transfer the data pieces to the arithmetic circuits.

SIMD microprocessor and method for controlling variable sized image data processing

A semiconductor memory device for reducing noise influence is disclosed. The device comprises an input circuit for receiving data to be written into a memory cell array and outputting the received data to write buffer circuits that write the received data into the memory cell array; an output circuit for outputting read data to the outside, each of the read data elements having been read out from the memory cell array and amplified by a corresponding sense amplifier; an input controller for controlling the input circuit so that the input circuit receives the received data only during a predetermined period; a plurality of input data lines for transmitting the received data from the input circuit to the write buffer circuits; and a plurality of output data lines for transmitting the data amplified by the sense amplifiers to the output circuit. Each of the input data lines and each of the output data lines are alternatingly and adjoiningly disposed on the semiconductor memory device.

Semiconductor memory device

A semiconductor memory includes a dummy memory circuit configured to simulate dummy data reading from an applicable dummy memory cell when data reading is performed. The dummy memory circuit may include a plurality of dummy memory cells each selected together with a corresponding memory cell for reading. The dummy memory cell may include pre-fixed complementary data. A dummy bit line pair may be connected to each of the plurality the dummy memory cells. A dummy pre-charge circuit may be provided so as to pre-charge the dummy bit line pair when data reading is performed. A dummy sense amplifier may be provided so as to amplify a potential difference of the dummy bit line pair. The dummy sense amplifier may output a control signal for controlling the semiconductor memory when the potential difference is at a prescribed level.

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Osaka, Japan

Toshiki Yamanaka