Sony Corporation

Japan Display Inc.

Toshikazu Maekawa

Yoshiharu Nakajima

Yoshitoshi Kida

Katsuhide Uchino

Masumitsu Ino

Mitsuo Soneda

Hiroaki Ichikawa

Yuji Hayashi

Kazuhiro Noda

Tsutomu Harada

Michiru Senda

Yasuhito Maki

Kazunori Yamaguchi

Ryoichi Tsuzaki

Mitsuru Tateuchi

Takaji Ohtsu

Hideyuki Kitagawa

Takashi Noguchi

Takeshi Matsushita

Hisao Hayashi

Yoshio Suzuki

Hideo Kataoka

Naoyuki Itakura

Yasushi Shimogaichi

Michio Negishi

Shintarou Morita

Hiroyoshi Tsubota

Hiroyuki Yoshine

Takefumi Ohshima

Haruhiko Kaneko

Kouji Otsu

Naoshi Goto

Shintaro Morita

Yuki Tashiro

An image pickup device capable of stably detecting an object irrespective of use conditions while reducing manufacturing costs is provided. When illumination light from a backlight is emitted to a proximity object from an I/O display panel, an electric charge is accumulated in image pickup pixels in accordance with total light amount, including reflected light originating from the backlight and external environment light. Moreover, when the illumination light is not emitted, a discharging electric charge is released from the image pickup pixels in accordance with the amount of environment light. Thereby, an environment light component is subtracted from an image pickup signal obtained from each of the image pickup pixels, so object information about the proximity object is obtained without influence of the environment light. Moreover, in a light reception drive circuit, fewer frame memories for producing a picked-up image from the image pickup signal are necessary.

Image pickup device, display-and-image-pickup device, electronic apparatus and method of detecting an object

An image pickup device capable of stably detecting an object irrespective of use conditions while reducing manufacturing costs is provided. When illumination light from a backlightis emitted to a proximity object from an I/O display panel, an electric charge for charging is accumulated in each of image pickup pixelsin accordance with total light amount as a summation of reflected light Lon originating from the illumination light and environment light (outside light) L. Moreover, when the above-described illumination light is not emitted, an electric charge for discharging is released from each of the image pickup pixelsin accordance with light amount of the environment light L. Thereby, a component by the environment light Lis subtracted in an image pickup signal obtained from each of the image pickup pixels, so object information about the proximity object is obtainable without influence of the environment light L. Moreover, in a light reception drive circuit, a smaller number of necessary frame memoriesA for producing a picked-up image from the image pickup signal than that in related art are necessary.

A digital/analog converter circuit, a level shift circuit, a shift register containing this level shift circuit, a sampling latch circuit and a latch circuit as well as a liquid crystal display device mounted with these respective circuits, wherein a drive circuit integrated with the LCD device containing the digital/analog converter circuit has polysilicon thin film transistors arrayed in a matrix on the substrate as switching devices for the pixels. A level shift circuit in the shift register has a basic structure of CMOS latch cells and is utilized in each level shift of the clock signal at each transfer stage, a sampling latch circuit with a basic structure of CMOS latch cells has a level shift function, and these respective circuits may be incorporated into a single scanning type structural circuit with the drive circuit-integrated liquid crystal display device to provide an LCD panel with an extremely narrow picture frame, stable level shift operation, stable sampling & latch operation in a circuit structure having an extremely small number of components, low power consumption and a small surface area.

Digital/analog converter circuit, level shift circuit, shift register utilizing level shift circuit, sampling latch circuit, and liquid crystal display device incorporating the same

A timing generating circuit with low power consumption and a small layout area, a display apparatus including the timing generating circuit as one peripheral driving circuit, and a portable terminal including the display apparatus as a display output section are provided. In the timing generating circuit, which is formed on an insulating substrate and generates output pulses SRFF1out to SRFFnout having different frequencies based on a master clock MCK, a clock generating circuit () generates an operating clock having a lower frequency than the master clock MCK frequency. Then, a counter section () operates based on this operating clock and successively outputs shifted pulses S/R1out to S/Rmount from shift registers (-) to (-m). An output pulse generating section () generates output pulses SF1out to SFnout based on combinations of the shifted pulses S/R1out to S/Rmount.

Timing generating circuit, display apparatus, and portable terminal

A liquid crystal display device enabling a reduction in size and costs associated with the system as a whole, starting to display images without image distortion at power on time, and turning the screen off without image retention at power off time, a method of controlling the liquid crystal display device, and a mobile terminal incorporating the liquid crystal display device as a screen display. On a glass substrate () provided with a display unit (), peripheral drive circuits such as an interface circuit (), a timing generator (), a reference voltage driver (), a CS driver (), a VCOM driver (), and a voltage regulation circuit (), together with a horizontal driver () and a vertical driver () are disposed. When a display reset control pulse PCI is supplied from an external source, a predetermined voltage is written into pixels while a CS voltage and a VCOM voltage adjusted to the same level as that of a pixel voltage are applied to a common-electrode-side. This allows the screen to turn white in a normally white type liquid crystal display, and to turn black in a normally black type liquid crystal display. Image distortion at power on/off time can thus be prevented.

Liquid crystal display device, method of controlling the same, and mobile terminal

In the present invention, during anH period excluding a blanking period (HB) constituting a line display period, pixel data pulses of RGB (B toR) are successively supplied for each color to corresponding signal lines for the color display of one pixel line. A control circuit () of select switches connected to the signal lines (-to-) supplies permission pulses (B toR) for the supply of data to signal lines when displaying one color among RGB to select switches (TMG), and turns on the select switch (TMG) of the signal line corresponding to another color to be displayed later in the same line display period during the period of this application by a precharge pulse (G orR) having a time duration shorter than the supply time of the pixel data of the other color (Tor T) to previously precharge the signal line of the other color to the predetermined potential. Due to this, sufficient precharging of a signal line, which became difficult due to an increase of a load capacitance of the signal line due to higher definition of the image display device and an increase in the speed of a drive clock thereof, can be achieved.

Image display device, image display panel, panel drive device, and method of driving image display panel

A timing generation circuit () is formed integrally on the same glass substrate () together with a display area section () similarly to an H driver (U) and a V driver (), and timing pulses to be used by the H driver (U) and the V driver () are produced based on timing data produced by a shift register (U) of the H driver (U) and a shift register (A) of the V driver (). The invention thereby provides a timing generation circuit which can contribute to miniaturization and reduction of the cost of the set and a display apparatus of the active matrix type in which the timing generation circuit is incorporated.

Timing generation circuit for display apparatus and display apparatus incorporating the same

An analog buffer circuit which has small input and output offsets and reduced power consumption even if it is formed on an insulating substrate by TFTs, a display device which uses the analog buffer circuit as a peripheral driving circuit for a display unit, and a portable terminal in which the display device is provided as a screen display unit are provided. By performing offset detection on a source follower in such a manner that, for example, two capacitors Cnand Cnare connected to the gate of a NMOS transistor Qnas a source follower, and conduction/nonconduction control of switches Snto Snare performed, if needed, and by sequentially canceling the detected offsets, a final offset voltage is sufficiently reduced and high precision offset cancellation is realized.

Analog buffer circuit, display device and portable terminal

This invention relates to a digital/analog converter circuit, a level shift circuit, a shift-register containing this level shift circuit, a sampling latch circuit and a latch circuit as well as a liquid crystal display (LCD) device. The LCD device includes an integrated drive circuit integrated and a digital/analog converter circuit. The digital/analog converter circuit has a matrix of polysilicon thin film transistors positioned on the substrate, as switching devices for the pixels. The shift register includes a level shift circuit and a sampling latch circuit These circuits may be incorporated into a single scanning type structural circuit with the drive circuit-integrated LCD device to provide an LCD panel with a narrow picture frame, stable level shift operation, stable sampling & latch operation in a circuit having an extremely small number of components, low power consumption and a small surface area.

Digital/analog converter circuit, level shift circuit, shift register utilizing level shift circuit, sampling latch circuit, latch circuit and liquid crystal display device incorporating the same

When a buffer is formed by using transistors having large element characteristic variations, the deviation of the timing between the input clock pulse and the reset pulse is likely to occur. When the deviation of the timing becomes larger, a malfunction is caused to occur, and an operation margin becomes smaller with respect to the variations of the element characteristics. In a timing generation circuit, which is formed on an insulating substrate and which has two TFFs (), for generating a dot clock DCK and a horizontal clock HCK whose frequencies are different in synchronization with a master clock MCK which is input external to the substrate, separate reset pulses drst and hrst are generated at a pulse generation circuitwith respect to the two TFFs (), and a resetting operation is performed at separate timings. Thus, a large operation margin can be ensured even when each circuit is formed by using TFTs having large element characteristic variations and a rough process rule.

Logic circuit, timing generation circuit, display device, and portable terminal

A timing generating circuit with low power consumption and a small layout area, a display apparatus including the timing generating circuit as one peripheral driving circuit, and a portable terminal including the display apparatus as a display output section are provided. In the timing generating circuit, which is formed on an insulating substrate and generates output pulses SRFFout to SRFFnout having different frequencies based on a master clock MCK, a clock generating circuit () generates an operating clock having a lower frequency than the master clock MCK frequency. Then, a counter section () operates based on this operating clock and successively outputs shifted pulses S/Rout to S/Rmount from shift registers (-) to (-m). An output pulse generating section () generates output pulses SFout to SFnout based on combinations of the shifted pulses S/Rout to S/Rmount.

Timing generation circuit, display apparatus, and portable terminal

In the case of an active matrix type TFT liquid crystal display apparatus of a dot successive driving system, between respectives of signal lines sigA through sigA wired at respective columns, and respectives of a signal line-A for inputting a precharge signal Psig-black at a black level and a precharge signal line-A for inputting a precharge signal Psig-gray at a gray level, sampling switches PbA through PbA and PgA through PgA of two routes are connected, to respectives of the signals lines sigA through sigA, firstly, the precharge signal Psig-black, successively, the precharge signal Psig-gray at the gray level are written in this order and thereafter, an image signal video is written thereto.

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Kanagawa, Japan

Toshikazu Maekawa