Kabushiki Kaisha Toshiba

Toshikazu Fujii

Akira Yamauchi

Takashi Koga

Yasuhiro Kakitsuka

A PWM modulator according to an embodiment includes a first comparator configured to compare a first input signal with a first carrier and output a comparison result, a second comparator configured to compare a second input signal with a second carrier and output a comparison result, and a selector configured to output the comparison result while switching between the comparison result of the first comparator and the comparison result of the second comparator in a cycle according to a cycle of the first or the second carrier.

PWM modulator

A recording and playback apparatus comprises, a drive unit configured to rotate an optical recording medium including a recording track, a recording and playback unit configured to irradiate a light beam on the recording track, and to perform recording and playback of an information detected a reflected light beam by an upside photo detection area and a downside photo detection area bisected in a tangential direction of the recording track, and a recording and playback controller configured to generate a position tracking signal based on the reflected light beam detected by the upside photo detection area and the downside photo detection area, and to compensate a level of the position tracking signal when the position tracking signal and a record mark on the recording track are detected.

Pre-pit signal generator compensating a pre-pit signal damped, semiconductor integrated circuit, recording and playback apparatus, and pre-pit signal generation method

A DC feed-back circuit for causing a DC voltage of an external transistor in which an output bias current of a record amplifier flows to be equal to a DC voltage of an output terminal is provided so as to decrease power consumption. Thus, a plurality of record amplifying circuits can be incorporated into one IC chip. In particular, in home-use Hi-Fi VCRs, a Hi-Fi record amplifying circuit and video record amplifying circuits can be incorporated into one chip.

Record amplifying circuit for respectively serially and differentially

Amplifying circuit for magnetic record and playback apparatus having

Amplifying circuit with DC voltage feedback to base terminal for

An extreme level circuit for detecting an extreme level of two input signals. The circuit includes a differential circuit wherein a pair of differential transistors are connected their emitters with each other and a common current source is connected to the emitter junction node of the differential transistors, a pair of emitter follower transistors coupled to the differential circuit for applying the input signals to the bases of the differential transistors and a pair of bias generating circuits each coupled in series with one of the emitter follower circuits, wherein each bias generating circuit has a bias transistor whose base is connected to a fixed bias source and a current source connected in series with the bias transistor, and wherein the pair of bias generating circuits are cross connected to the collectors of the differential transistors.

Extreme level circuit

A Y/C separation circuit for separating the Y and C components of a composite video signal having a horizontal scan period, which includes an input circuit for receiving the composite video signal, a first delay which receives the composite video signal and delays the composite video signal by an amount equal to an integer times the horizontal scan period, a second delay which receives the delayed output signal from the first delay and delays delayed output signal by an amount equal to an integral plus one times the horizontal scan period, a C component extraction circuit which receives the composite video signal and the output from the first and second delays and outputs a C component signal representing the C component of the composite video signal and a Y component extraction circuit which receives the composite video signal from the input circuit and the C component signal from the C component extraction circuit and generates a Y component signal representing the Y component of the composite video signal by subtracting the C component signal from the composite video signal.

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Kanagawa, Japan

Toshikazu Fujii