Fujitsu Corporation

Fujitsu Microelectronics Limited

Toshihito Shimizu

Hitoshi Watanabe

Koichi Itaya

Ryuji Shimizu

Hideaki Konishi

Osamu Ōkano

Junko Kumagai

Kazuyuki Yamamura

Takeshi Doi

Yuko Katoh

Daisuke Tsukuda

Naoko Karasawa

An apparatus for supporting verification includes a detecting unit that detects description data of a false path from setting data for a system mode operation of a target circuit to be verified; an analyzing unit that analyzes the description data in the system mode operation and a test mode operation of the target circuit; a diversion determining unit that determines, based on a result of analysis by the analyzing unit, whether the description data is divertible to the test mode operation; and a generating unit that generates setting data for the test mode operation based on a result of determination by the determining unit.

Method and apparatus for supporting verification, and computer product

A design support apparatus includes a unit that inputs a user net list created by using hard macro cells excluding test circuits, and a unit that arranges hard macro cells using a frame into which hard macro cells, where timing-converged physical information includes test terminals, and test circuits are embedded as arrangement/wiring information. Moreover, includes a unit that arranges and wires the test circuits using the arrangement/wiring information of the test circuit embedded into the frame, a unit that recognizes arrangement/wiring information where the arrangement/wiring information of the test circuits is removed from arrangement/wiring information obtained by wiring, and a unit outputs a net list of a logic structure.

Method and apparatus for supporting designing of LSI, and computer product

Growing community of inventors

Kawasaki, Japan

Toshihito Shimizu