Semiconductor Energy Laboratory Co., Ltd.

Toshihiko Takeuchi

Shunpei Yamazaki

Takeshi Osada

Teppei Oguni

Yasumasa Yamane

Tetsuhiro Tanaka

Tsutomu Murakawa

Masashi Tsubuku

Tomoaki Moriwaka

Naoto Yamade

Ryo Tokumaru

Hiromi Sawai

Sachiaki Tezuka

Takayuki Inoue

Hiroki Komagata

Kuniharu Nomoto

Shunsuke Kimura

Hiroshi Fujiki

Makoto Ishikawa

Akihisa Shimomura

Daisuke Matsubayashi

Mitsuhiro Ichijo

Kazutaka Kuriki

Yusuke Nonaka

Yutaka Okazaki

Satoshi Toriumi

Yuhei Sato

Noritaka Ishihara

Takashi Ohtsuki

Toshiya Endo

Sho Nagamatsu

Yasuhiko Takemura

Kiyoshi Kato

Hideomi Suzawa

Kosei Noda

Hidetomo Kobayashi

Minoru Takahashi

Masashi Fujita

Masashi Oota

Kiyofumi Ogino

Kazuaki Ohshima

Suguru Hondo

Kazuki Tanemura

Shota Sambonsuge

Kazuya Sugimoto

Yoshitaka Yamamoto

Takuya Hirohashi

Yasunori Yoshida

Katsuaki Tochibayashi

Atsushi Hirose

Ryota Hodo

Tomokazu Yokoi

Kosei Nei

Taiga Muraoka

Kazuma Furutani

Kentaro Sugaya

Asami Tadokoro

Hiroyuki Tomisu

Michiko Konishi

Yuki Murakami

A semiconductor device includes a first layer and a second layer over the first layer. The first layer and the second layer each include a transistor. The transistor in the first layer and the transistor in the second layer each include a first oxide, a first conductor and a second conductor over the first oxide, a first insulator placed to cover the first conductor, the second conductor, and the first oxide, a second insulator over the first insulator, a second oxide placed between the first conductor and the second conductor over the first oxide, a third insulator over the second oxide, a third conductor over the third insulator, and a fourth insulator in contact with a top surface of the second insulator, a top surface of the second oxide, a top surface of the third insulator, and a top surface of the third conductor.

Semiconductor device

The semiconductor device includes a first conductor and a second conductor; a first insulator to a third insulator; and a first oxide to a third oxide. The first conductor is disposed to be exposed from a top surface of the first insulator. The first oxide is disposed over the first insulator and the first conductor. A first opening reaching the first conductor is provided in the first oxide. The second oxide is disposed over the first oxide. The second oxide comprises a first region, a second region, and a third region positioned between the first region and the second region. The third oxide is disposed over the second oxide. The second insulator is disposed over the third oxide. The second conductor is disposed over the second insulator. The third insulator is disposed to cover the first region and the second region and to be in contact with the top surface of the first insulator.

A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first conductor, a second conductor over the first conductor, a first insulator covering the second conductor, a first oxide over the first insulator, and a second oxide over the first oxide, an opening overlapping with at least part of the first conductor is provided in the first oxide and the first insulator, and the second oxide is electrically connected to the first conductor through the opening.

Integrated semiconductor with shared electrodes between capacitor and transistor

To form graphene to a practically even thickness on an object having an uneven surface or a complex surface, in particular, an object having a surface with a three-dimensional structure due to complex unevenness, or an object having a curved surface. The object and an electrode are immersed in a graphene oxide solution, and voltage is applied between the object and the electrode. At this time, the object serves as an anode. Graphene oxide is attracted to the anode because of being negatively charged, and deposited on the surface of the object to have a practically even thickness. A portion where graphene oxide is deposited is unlikely coated with another graphene oxide. Thus, deposited graphene oxide is reduced to graphene, whereby graphene can be formed to have a practically even thickness on an object having surface with complex unevenness.

Method for manufacturing graphene-coated object, negative electrode of secondary battery including graphene-coated object, and secondary battery including the negative electrode

Graphene is formed with a practically uniform thickness on an uneven object. The object is immersed in a graphene oxide solution, and then taken out of the solution and dried; alternatively, the object and an electrode are immersed therein and voltage is applied between the electrode and the object used as an anode. Graphene oxide is negatively charged, and thus is drawn to and deposited on a surface of the object, with a practically uniform thickness. After that, the object is heated in vacuum or a reducing atmosphere, so that the graphene oxide is reduced to be graphene. In this manner, a graphene layer with a practically uniform thickness can be formed even on a surface of the uneven object.

Single-layer and multilayer graphene, method of manufacturing the same, object including the same, and electric device including the same

A semiconductor device which has favorable electrical characteristics and can be highly integrated is provided. The semiconductor device includes a first insulator; an oxide over the first insulator; a second insulator over the oxide; a first conductor over the second insulator; a third insulator in contact with a top surface of the first insulator, a side surface of the oxide, a top surface of the oxide, a side surface of the second insulator, and a side surface of the first conductor; and a fourth insulator over the third insulator. The third insulator includes an opening exposing the first insulator, and the fourth insulator is in contact with the first insulator through the opening.

Semiconductor device having plurality of insulators

Semiconductor device and method for manufacturing semiconductor device

A semiconductor device that can be scaled down or highly integrated is provided. The semiconductor device includes a first layer and a second layer over the first layer. The first layer and the second layer each include a transistor. The transistor in the first layer and the transistor in the second layer each include a first oxide, a first conductor and a second conductor over the first oxide, a first insulator placed to cover the first conductor, the second conductor, and the first oxide, a second insulator over the first insulator, a second oxide placed between the first conductor and the second conductor over the first oxide, a third insulator over the second oxide, a third conductor over the third insulator, and a fourth insulator in contact with a top surface of the second insulator, a top surface of the second oxide, a top surface of the third insulator, and a top surface of the third conductor. The first insulator and the fourth insulator are less likely than the second insulator to allow oxygen to pass through.

A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes a conductor, a first insulator in contact with a side surface of the conductor, a second insulator in contact with a top surface of the conductor and a top surface of the first insulator, and an oxide over the second insulator. The oxide includes a region that overlaps with the conductor with the second insulator interposed therebetween. The maximum height of a roughness curve (Rz) of the top surface of the conductor is 6.0 nm or smaller. The region includes crystals, and c-axes of the crystals are aligned in the normal direction of the top surface of the conductor.

Oxide semiconductor device

A semiconductor device in which a transistor has the characteristic of low off-state current is provided. The transistor comprises an oxide semiconductor layer having a channel region whose channel width is smaller than 70 nm. A temporal change in off-state current of the transistor over time can be represented by Formula (a2). In Formula (a2), Irepresents the off-state current, t represents time during which the transistor is off, &#x3b1; and &#x3c4; are constants, &#x3b2; is a constant that satisfies 0&#x3c;&#x3b2;&#x2264;1, and Cis a constant that represents load capacitance of a source or a drain. 

Semiconductor device and method for measuring current of semiconductor device

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Kanagawa, Japan

Toshihiko Takeuchi