Sony Corporation

Sony Semiconductor Solutions Corporation

Japan Display West Inc.

Toshihiko Orii

Osamu Akimoto

Hitoshi Abe

Hiroshi Nakao

Naoki Ando

Toshihiko Mochida

Takayuki Ishida

Takahiro Mochizuki

Masa Tanaka

Naoyuki Itakura

Kazuhiro Takeda

Tomoyuki Fukano

Yoshiro Okawa

Naoki Andou

Keiko Kawaguchi

Shodai Nakayama

Tooru Yokokura

Masahiro Ueshima

An object of the present disclosure is to provide a phase modulator, a lighting system, and a projector that allow for improving diffraction efficiency in a light phase modulation element. The phase modulator according to the present disclosure includes a light phase modulation element that has a plurality of pixels arranged with the pixel pitches p being different from each other to have a pixel structure suppressing occurrence of high-order diffraction light and that modulates a phase of light with respect to each of the pixels. Moreover, the phase modulator according to the present disclosure includes a capturing optical system that captures a plurality of fluxes of high-order diffraction light generated in each of the pixels.

Phase modulator, lighting system, and projector

A display device according to the present disclosure includes: pixels arranged in a matrix; a data line group that includes a pair of data lines for each pixel column; a data line drive circuit that supplies a positive-phase data signal to one of the pair of data lines, and a negative-phase data signal to the other of the pair of data lines; and an auxiliary drive circuit that is provided for each pair of data lines, and that processes the positive-phase data signal and the negative-phase data signal, in which the auxiliary drive circuit has a dead zone in a region where there is no difference between a positive-phase potential and a negative-phase potential, or where the difference in potential is smaller than a predetermined value. An electronic apparatus according to the present disclosure includes a display device having the configuration described above.

Display device and electronic apparatus

A display apparatus including: a pixel section having a plurality of pixel circuits arranged two-dimensionally by being each provided at an intersection of a scan line and a signal line as a circuit including a switching device, a display element and a storage capacitor; and a correction circuit for correcting a storage-capacitor voltage supplied to the storage capacitors, wherein the correction circuit employs a comparator for detecting the difference between electric potentials received from a portion of the pixel section as a pixel electric potential having a positive polarity and a pixel electric potential having a negative polarity and for comparing the difference in electric potential with a reference voltage, and an output-voltage control circuit for converting a comparison result output by the comparator into a correction signal used for correcting the storage-capacitor voltage to be asserted on a storage-capacitor line used for supplying the storage-capacitor voltage.

Display apparatus and display method

A liquid crystal display in which image quality is enhanced by reducing coupling noise with adjacent wiring or element and noise entering therefrom, and redundancy is imparted even when short circuit of wiring takes place in a pixel and a defect can be treated as if it is not a defect. Display pixels are provided, respectively, at the intersections of a plurality of vertical signal lines () and a plurality of horizontal signal lines (), each of the vertical signal lines () and the horizontal signal lines () is provided with a shield wire () and the potential of the shield wire () is set at such a level as to display the display pixel in black.

Liquid crystal display apparatus

Disclosed is a semiconductor device capable of realizing a reduction in the area of each pixel without degrading noise resistance. A switching transistor () and a signal accumulation capacitor () are formed on a semiconductor substrate (base semiconductor region) () of a first conduction type, on the basis of each unit region for constituting a pixel Px. The switching transistor () has a structure in which a source region (S) and a drain region (D) of a second conduction type are formed on the semiconductor substrate (), and a gate electrode (G) is formed on the region between the source region (S) and the drain region (D), with an insulating layer () therebetween. The signal accumulation capacitor () has a structure in which high-concentration semiconductor regions (D) and (S) of the first conduction type are formed on the semiconductor substrate (), and an electrode (G) is formed on the region between the semiconductor regions (D) and (S), with an insulating layer () therebetween. A structure may be adopted in which a bias semiconductor region () is not provided, and the semiconductor regions (D) and (S) are made to serve also as the bias semiconductor region.

Semiconductor device, reflection type liquid crystal display device, and reflection type liquid crystal projector

A voltage to be used for scanning of scanning lines can be changed over between AVDwhich is within a gate withstanding voltage of a switching element and AVDhigher than the gate withstanding voltage. Within a horizontal blanking period, scanning of the scanning lines is started with AVD, and then precharging of data lines is performed. Thereafter, the voltage is changed over to AVD. Since, at this point of time, a potential corresponding to the precharge voltage is generated in a pixel capacitor, even if AVDexceeding the withstanding voltage is applied to a pixel switch, a potential difference which does not exceed the withstanding voltage can be produced between terminals of the switching element.

Display drive method, display element, and display

A method for testing a semiconductor substrate forming a liquid crystal display device, which method enables a potential change corresponding to a defective condition of pixel cell driving circuits to be detected accurately even when a ratio of pixel capacitance to wiring capacitance is lowered with decrease in size or increase in definition of the liquid crystal display device. The method includes: a charge retaining step for making pixel capacitances connected to a plurality of pixel switches selected from all pixel switches connected to one data line retain charge; and a detecting step for simultaneously detecting the charge retained in a plurality of the pixel capacitances in the charge retaining step from the one data line.

Testing method, semiconductor device, and display apparatus

Inspecting method, semiconductor device, and display apparatus

A data slice circuit capable of generating an optimal data slice level and separating data for VBI signals of different specifications, provided with a line detection circuit for detecting any line on which a VBI signal having a CRI signal is superposed and outputting a line detection pulse only during the period and detecting any line on which a VBI signal having a reference signal is superposed and outputting another line detection pulse only during that period, a window pulse generation circuit for outputting pulses changing a period of averaging the VBI signal in accordance with the detection pulses, a data slice reference voltage detection circuit for sampling and holding an average voltage of the clamped VBI signal only while the output pulses are at a high level 'H', and a data slice level generation circuit for adding a direct current voltage changed in accordance with the detection pulsed to the output voltage.

Data slice circuit separating data added to a signal superposed on a video signal based on slice level

A wave reforming circuit for correcting the upward and downward asymmetry of and binary coding a data train signal modulated by EFM modulation or another modulation method giving a substantially equal rate of occurrence of &ldquo;1&rdquo; and &ldquo;0&rdquo;, which can output to a comparator outputting binary data a binary signal holding a predetermined temporal mean value regardless of fluctuation in the temporal mean value of the input signal and having superior symmetry compared with the related art using as a reference value three types of reference voltages (0 level, positive side, and negative side) generated by inputting an integrated value of the output of the comparator into a charge pump.

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Kanagawa, Japan

Toshihiko Orii