Matsushita Electric Industrial Co., Ltd.

Toshihiko Maruoka

Keisuke Tanaka

Kenichi Honjo

Makoto Gotou

Haruo Isaka

Kei Ichikawa

Masafumi Shimotashiro

Kiyokazu Hashimoto

Satoru Kotani

Masanobu Kuboshima

This invention provides an on-screen display device that can display an increased number of types of characters without enlarging the video RAM area. This on-screen display device includes a character generator ROM that has n (n is an integer that is equal to or larger than 3) areas, a flag holding unit that outputs an area designation flag for designating a desired number of desired areas among the n areas in the character generator ROM, a display character setting unit that writes a desired character code at a predetermined position in a video RAM, and a display control unit that reads the character code from the video RAM, reads font data corresponding to the read character code from an area in the character generator ROM, which is indicated by the area designation flag outputted from the flag holding unit, and outputs an on-screen output signal using the font data.

On-screen display device

An on-screen display device that can effectively utilize a video RAM area. This on-screen display device includes a video RAM that holds character data of desired characters that are to be displayed; a display character setting unit for locating the number of bits as many as the remainder that is obtained by dividing character data corresponding to one character by the number of bits that can be read at one-time access from the video RAM, collectively by one line in the video RAM; buffers for storing a part of character data of the respective characters; a character generator ROM for outputting font data corresponding to the character codes; and a display control unit for reading character data from the video RAM via the buffers at the display of the characters, and reading the font data that are created by the character generator ROM, thereby outputting an on-screen output signal.

A reset circuit of a semiconductor circuit for reliably resetting plural reset target circuits in the semiconductor circuit, even when a surge noise signal having a short pulse length or the like is input to the reset circuit, the reset circuit including a reset signal control circuit for controlling timing of deactivating a reset instruction signal for resetting plural reset target circuits in the semiconductor circuit. Respective reset target circuits are for outputting reset completion signals to the reset signal control circuit when the respective reset target circuits have been reset. The reset signal control circuit also is for deactivating the reset instruction signal when all of the reset completion signals have been activated.

Reset circuit of semiconductor circuit

A magnetic recording and reproducing apparatus includes: a recorder for recording information signals so as to form tracks obliquely on a magnetic tape, and for recording pilot signals so that the frequency may differ between different modes such as SP and LP; a reproducing head for reproducing recorded information; an error detecting circuit for comparing the level difference of pilot signals recorded in both tracks adjacent to the track to be scanned by there producing head and for outputting a tracking error signal; and a controller for controlling the feed of the magnetic tape so that the tracking error signal may be balanced. Preferably, in the LP mode, a pilot signal of a higher frequency than that used in the SP mode is recorded. In a tracking error detector for a magnetic recording and reproducing apparatus for detecting the pilot signal, the reproduced signals are sampled at a frequency at a common multiple of each pilot frequency, a pilot signal is detected, and a tracking error signal is output.

Tracking error detector with comparison of amplitude detected pilot

A tracking error detecting circuit is used in a magnetic reproducing apparatus for reproducing an information signal from tracks which are formed on a magnetic tape obliquely in a longitudinal direction of the magnetic tape. The tracks have selectively recorded thereon a pilot signal multiplexed with the information signal. The tracking error detecting circuit comprises: a rotating magnetic head scanning the tracks for reproducing the information signal on which the pilot signal is selectively multiplexed to obtain a reproduced signal; a comparator for comparing a level of the reproduced signal with a specified level and for issuing a binary signal representing a comparison result; and a level detecting circuit for detecting a level of the pilot signal contained in the reproduced signal from an output of the comparator.

Growing community of inventors

Ikeda, Japan

Toshihiko Maruoka