Fujitsu Corporation

Fujitsu Semiconductor Limited

Fujitsu Microelectronics Limited

Fijitsu Limited

Toshihiko Kasai

Yoshihiro Kizaki

Shinya Udo

Masatoshi Kokubun

Hidenobu Ito

Morihito Hasegawa

Hidekiyo Ozawa

Katsuyuki Yasukouchi

Osamu Kudo

Shoji Tajiri

Kwok Fai Hui

Kenji Kato

A power control device for performing switching control for an output voltage of a power supply device includes a signal generation circuit for comparing a difference between a value of the output voltage and a value of a first reference voltage with a value of a second reference voltage, and for stopping the switching control when a value of the difference is less than or equal to the value of the second reference voltage, and an adjuster circuit for adjusting the second reference voltage based on a ratio between a value of an input voltage and the value of the output voltage.

Power control device, power supply device, and power control method

A power supply circuit includes an output transistor including a source coupled to power supply voltage, and a drain from which output voltage is outputted; a first error amplifier powered by the power supply voltage and outputting a signal based on a potential difference between the output voltage and a reference voltage; a buffer transistor including a gate coupled to the output of the first error amplifier, and a source coupled via a constant current source to the power supply voltage and coupled to a gate of the output transistor; a current detection transistor coupled to the output transistor such that a gate and source are shared; and an overcurrent protection circuit configured to limit the drain current of the buffer transistor based on the increase of the drain current of the current detection transistor and thereby control the output current of the output transistor.

Power supply circuit, overcurrent protection circuit for the same, and electronic device

An operational amplifier capable of offset cancel in a shorter period, as well as a line driver capable of shortening one horizontal period and a liquid crystal display device are provided. In the operational amplifier of the invention, a time necessary for feed back control can be shortened than usual by a constitution that an output voltage VO in one horizontal period Hwhich is one horizontal period before is defined as a reference voltage in an offset cancel preparatory period HC, thereby changing the output voltage VO() only by the offset voltage VO() by the feed back control. In the line driver of the invention, the operational amplifier not used for the output of display data Dto Dconducts offset cancel operation and it is successively shifted on every one horizontal period. Since it is no more necessary to incorporate the offset cancel preparatory period in the output period, one horizontal period can be shortened further.

Operational amplifier, line driver, and liquid crystal display device

A DC-DC converter reducing reversed current in a low load state and increasing output voltage response speed. An error amplification circuit generates an error signal from the output voltage. A pulse signal generation circuit generates a first pulse signal in accordance with the error signal. A comparison circuit generates a comparison result signal from the error signal. A drive signal generation circuit generates a constant level signal and a second pulse signal. An output circuit receives the first pulse signal and either the constant level signal or the second pulse signal to generate first and second drive signals for driving first and second transistors. The output circuit generates the second drive signal in accordance with the first pulse signal when receiving the constant level signal and generates the second drive signal with the first and second pulse signals when receiving the second pulse signal.

Method and circuit for controlling DC-DC converter

When both step-up PWM control and step-down PWM controls are executed, the offset of the ON/OFF switching timing for step-up PWM control and/or the offset of ON/OFF switching timing for step-down PWM control are changed to become identical. By synchronizing ON/OFF switching timing for step-up PWM control and ON/OFF switching timing for step-down PWM control, the loss on switching can be reduced.

DC-DC converter with step-up and step-down control capable of varying the offset voltage of the PWM triangle

The invention provides a DC-DC converter capable of being started up in a state in which an input voltage is low and capable of being structured without increasing a circuit size. A back-gate voltage (Vsb) is outputted from a back-gate voltage generating circuit (VBGN), and is inputted to a back gate of a transistor (FET). During a period during which an output voltage (Vout) is lower than a reference voltage (e), an oscillation signal (OS) is inputted to a gate of the transistor (FET), and the back-gate voltage (Vsb) is set at a grounded voltage. Therefore, the transistor (FET) has a reference threshold voltage (Vto). On the other hand, during a period during which the output voltage (Vout) is higher than the reference voltage (e), a pulse signal (PS) is inputted to the gate of the transistor (FET), and the back-gate voltage (Vsb) is set at an output voltage of a charge pump portion (). Therefore, the transistor (FET) has a threshold voltage higher than the reference threshold voltage (Vto).

Step-up (boost) DC regulator with two-level back-bias switch gate voltage

A bias circuit generates a first voltage at a first node. A second current source generates, according to the first voltage, a power supply current to be supplied to an internal circuit including transistors. A correcting transistor in a correcting circuit supplies the first node with a correcting current generated according to a constant voltage. Because of this, the first voltage is adjusted according to the correcting current. Therefore, the operating speed of the internal circuit is prevented from changing, being dependent on the variation of the threshold voltage and temperature variation of a transistor. As a result, the yield can be improved, independently of the variation of the threshold voltage among semiconductor integrated circuit chips, which occurs in a fabrication process. Further, temperature dependency of the operating speed of the internal circuit can be reduced, which can improve the yield of the semiconductor integrated circuit.

Growing community of inventors

Kasugai, Japan

Toshihiko Kasai