Sharp Kabushiki Kaisha Corporation

Toshihide Tsubata

Masanori Takeuchi

Naoshi Yamada

Tsuyoshi Tokuda

Kenji Enda

Toshifumi Yagi

Fumikazu Shimoshikiryoh

Masae Kitayama

Toshinori Sugihara

Yuhko Hisada

Akihiro Shoraku

Masayuki Tsuji

Kentaro Irie

Tomoki Noda

Nobuyoshi Nagashima

Yoshihiro Okada

Atsushi Ban

Hidetoshi Nakagawa

Yoshinori Shimada

Hidehiko Yamaguchi

Morihide Ohsaki

Mitsuaki Hirata

Ikumi Itsumi

Yukio Kurozumi

Tomokazu Ohtsubo

Ryuji Kurihara

Koichi Miyachi

Masumi Kubo

Akihiro Yamamoto

Iichiro Inoue

Akihito Jinda

Yoshito Hashimoto

Shinichi Hirato

Kentaroh Irie

Yoshinori Kinai

Kohji Matsuoka

Makoto Shiomi

Shigeaki Mizushima

Yukio Yoshida

Akihiro Shohraku

Koji Matsuoka

Yuhko Hashimoto

Yoshio Hirakata

Keiichi Tanaka

Yoshiki Takata

Mitsuhiro Shigeta

Masae Kawabata

Masahiro Matsuda

Akira Yamaguchi

Yuki Yamashita

Akane Sugisaka

Hiroto Akiyama

Hiroto Suzuki

Yoshitaka Okumoto

Toshihisa Uchida

Junichi Sawahata

Kenichi Hyohdoh

Nobuhiko Nakai

Masayuki Katakami

Yasuyuki Ohta

Yuhichi Inoue

Masaomi Okamoto

Shinya Maruoka

Junichi Hiraki

In one embodiment of the present invention, each pixel includes first and second subpixels. CS bus lines connected to the respective storage capacitors of the first and second subpixels are electrically independent of each other. A CS voltage has a waveform that inverts its polarity at least once a frame, which includes a first subframe for sequentially scanning a series of odd rows and a second SF for sequentially scanning even rows that have been skipped during the first SF. A source signal voltage varies so as to have two frames or subframes with mutually opposite polarities. A CS voltage has a waveform that has quite opposite consequences on the effective voltage of a subpixel of a pixel connected to the jscan line to be selected during the first subframe and on that of another subpixel of a pixel connected to the (j+1)scan line to be selected during the second subframe. In this manner, the deterioration in display quality, which would be caused if either a source line inversion drive or a block inversion drive is applied to a multi-pixel technology, can be minimized.

Liquid crystal display

A liquid crystal display device includes a vertical alignment liquid crystal layer, first and second substrates, first and second electrodes, and a pixel region which includes first, second, third and fourth liquid crystal domains in which liquid crystal molecules are tilted in first, second, third and fourth directions, respectively. The first liquid crystal domain is located close to at least a part of an edge of the first electrode, the second liquid crystal domain is located close to at least a part of another edge of the first electrode, the third liquid crystal domain is located close to at least a part of still another edge of the first electrode, and the fourth liquid crystal domain is located close to at least a part of yet another edge of the first electrode.

Liquid crystal display device

A liquid crystal display device () according to the present invention has a plurality of pixels that are arranged in columns and rows to form a matrix pattern and one color display pixel (P) is comprised of four or any other larger even number of pixels. The liquid crystal display device () of the present invention includes a plurality of source bus lines () which run in a column direction. The even number of pixels that form one color display pixel (P) include larger pixels with a relatively large area and smaller pixels with a relatively small area. Each set of pixels to be supplied with a signal voltage from an associated one of the plurality of source bus lines () has substantially the same total area as any other set of pixels. According to the present invention, in a liquid crystal display device in which a plurality of pixels that forms one color display pixel includes the larger and smaller pixels, generation of display unevenness that runs in the column direction can be minimized.

The present invention provides a liquid crystal display panel which can prevent an electric short circuit (leakage) between a pair of substrates with no additional production step in the case where a multilayer spacer is used. The present invention is a liquid crystal display panel comprising: a pair of substrates; and a liquid crystal layer between the substrates, wherein a first substrate of the substrates has a support substrate, a plurality of pixel electrodes, transparent colored layers of plural colors overlapping with the pixel electrodes, and a multilayer spacer formed of a stacked body of three or more resin layers including transparent colored layers of plural colors, and a second substrate of the substrates has a supporting substrate and a common electrode.

Liquid crystal display panel

Disclosed is a liquid crystal panel including a scan signal line (), a data signal line (), and a transistor () that is connected to the scan signal line () and the data signal line (). A pixel () is provided with pixel electrodes (and). The pixel electrode () is connected to the data signal line () through the transistor (). The liquid crystal panel further includes capacitance electrodes (and) that are formed in the same layer as the scan signal line (). The capacitance electrodes (and) are electrically connected to the pixel electrode (), and form a capacitance with the pixel electrode (). Consequently, the yield of a capacitance coupling type pixel division system active matrix substrate can be improved.

Active matrix substrate, method for producing active matrix substrate, liquid crystal panel, method for producing liquid crystal panel, liquid crystal display device, liquid crystal display unit, and television receiver

Pixel electrodes (and) are provided in a pixel (), and the pixel () is associated with a data signal line (), scanning signal lines (and), and transistors (and). One pixel electrode () is connected to the data signal line () via the transistor (). The other pixel electrode () is connected to the pixel electrode () via a capacitor (C) and is connected to the data signal line () via the transistor (). Storage capacitance (Cha and Chb) is formed between the pixel electrodes (and) of the pixel () and a scanning signal line () associated with a pixel (). Thus, a configuration of a liquid crystal display device of a capacitively coupled pixel division mode is proposed in which a decline in display quality caused by image sticking of a sub-pixel is less likely to occur.

Active matrix substrate, liquid crystal panel, liquid crystal display device, liquid crystal display unit, and television receiver

Provided is a liquid crystal display device including: pixels that are provided in a row direction and a column direction in which data signal lines extend, the pixels each including a plurality of pixel electrodes, in a pixel, in an nth frame, a pixel electrode being electrically connected to a data signal line, and in the frame, the plurality of pixel electrodes being electrically connected to each other and being electrically disconnected from the data signal line. This allows an improvement in viewing angle characteristic of a liquid crystal display device.

Liquid crystal display device, television receiver and display method employed in liquid crystal display device

Each pixel includes two pixel electrodes connected to each other via a capacitor, and in respect to a pixel () that belongs to the column of pixels and to the row of pixels, a transistor () connected to one of the two scanning signal lines () is electrically connected to one of two pixel electrodes () included in the pixel (), a transistor () connected to the other one of the two scanning signal lines is electrically connected to the other one of the two pixel electrodes, and each of these transistors () is electrically connected to an identical data signal line () that is one of the two data signal lines ().

An active matrix substrate is arranged such that each pixel region includes two pixel electrodes, each data signal line extends in a column direction, each column of pixel regions is associated with two data signal lines, one pixel electrode of the pixel region included in the column of pixel regions is connected to one of the two data signal lines via a transistor that is connected to a scanning signal line, the other pixel electrode of the pixel region is connected to the other one of the two data signal lines via a transistor that is connected to another scanning signal line, and one of pixel electrodes included in one of two adjacent pixel regions of the column and one of pixel electrodes included in the other one of the two adjacent pixel regions of the column are connected to an identical scanning signal line via respective transistors.

Disclosed herein is a liquid crystal panel including: first and second pixel electrode (and) in a single pixel (); a first upper capacitor electrode () connected with the first pixel electrode (); a second upper capacitor electrode () connected with the second pixel electrode (); a first lower capacitor electrode () that is provided in a layer in which a scanning signal line () is provided and that is connected with the first pixel electrode (); and a second lower capacitor electrode () that is provided in the layer and that is connected with the second pixel electrode (), the first pixel electrode () being connected with a data signal line () via a transistor (), a capacitor being formed between the first upper capacitor electrode () and the second lower capacitor electrode (), a capacitor being formed between the second upper capacitor electrode () and the first lower capacitor electrode ().

Active matrix device including first and second capacitor electrodes and multiple capacitors

An array substrate disclosed herein includes: scanning signal lines (and); data signal lines (X, andY) to each of which a data signal is supplied; a first pixel region column; and a second pixel region column adjacent to the first pixel region column, each of the first and second pixel region columns including pixel regions, wherein: two data signal lines corresponding to the first pixel region column are provided, two data signal lines corresponding to the second pixel region column are provided, a gap between two adjacent data signal lines (andX) is provided, one of the two adjacent data signal lines being corresponding to the first pixel region column, and the other of the two adjacent data signal lines being corresponding to the second pixel region column; and a gap lineis provided within the gap, a Vcom signal being supplied to the gap line. This improves display quality of a liquid crystal display device in which each pixel column corresponds to a plurality of data signal lines.

Array substrate, liquid crystal panel, liquid crystal display device, and television receiver

In one embodiment of the present invention, a driving method of a liquid crystal display device is disclosed. According to one embodiment of the present invention a driving method of an active matrix display device is disclosed including: a plurality of source lines; a plurality of gate lines that intersect the source lines; and a plurality of pixel formation sections being disposed in a matrix manner at the respective intersections of the source lines and the gate lines, each of the pixel formation sections receiving as a pixel value a voltage applied to the source line that passes through the corresponding intersection when the gate line that passes through the corresponding intersection is selected, wherein non-image signals are applied to the source lines in each horizontal scanning period, and the gate lines are selected in an effective scanning period, and thereafter the gate lines are selected, in sync with a timing of application of the non-image signals to the source lines, before the subsequent effective scanning period comes after a point in time when the gate lines have been brought into non-selected state.

Liquid Crystal display device and driving method thereof, television receiver, liquid crystal display program computer-readable storage medium storing the liquid crystal display program, and drive circuit

When each of R, G, and B pixels continuously display identical gray scales (1023 gray scale) in a liquid crystal display device in which the thicknesses of the liquid crystal layers are of R pixel&#x3e;G pixel&#x3e;B pixel, the R pixel is alternately supplied with a positive signal potential (SHR) and a negative signal potential (SLR), the G pixel is alternately supplied with a positive signal potential (SHG) and a negative signal potential (SLG), and the B pixel is alternately supplied with a positive signal potential (SHB) and a negative signal potential (SLB). A first middle value (SMR) that between SHRand SLRis set higher than a second middle value (SMG) that is between SHGand SLG, and second middle value (SMG) is set higher than a third middle value (SMB) that is between SHBand SLB

Disclosed is a liquid crystal panel comprising a scan signal line (), a data signal line (), and a transistor () that is connected to the scan signal line () and the data signal line (), wherein a pixel () is provided with pixel electrodes (). The pixel electrode () is connected to the data signal line () through the transistor (). The liquid crystal panel also includes a capacitance electrode () which is electrically connected to the pixel electrode (). The capacitance electrode () and the pixel electrode () overlap with each other through an insulating film interposed therebetween; the capacitance electrode () and the pixel electrode () overlap with each other through an insulating film interposed therebetween; and the areas of the overlapping portions are equal to each other. Consequently, the yield can be improved in a capacitive coupling type pixel division system active matrix substrate or in a liquid crystal panel comprising the active matrix substrate.

In one embodiment, a liquid crystal display device is disclosed in which a gate driver applies a gate-on pulse so that a second period is longer than a first period. Among gate-on pulses applied before the moment of polarity inversion of a data signal, the last end of the gate-on pulse nearest to the moment of the polarity inversion is earlier than the end time of the horizontal period during which the gate-on pulse is applied. The first period starts at the last end of the gate-on pulse and ends at the end time of the horizontal period during which the gate-on pulse is applied. The second period starts at the moment of the polarity inversion and ends at the moment of the application start of the gate-on pulse nearest to the moment of the polarity inversion among the gate-on pulses applied after the polarity inversion.

Liquid crystal display device, scan signal drive device, liquid crystal display device drive method, scan signal drive method, and television receiver

Growing community of inventors

Tsu, Japan

Toshihide Tsubata