Fujitsu Corporation

Fujitsu Semiconductor Limited

Toshihide Suzuki

Yoichi Kawano

Masashi Shima

Hiroshi Matsumura

Kazukiyo Joshin

Masaru Sato

Daijiro Ishibashi

Akiko Mineyama

A high-frequency module includes an integrated body including a semiconductor chip and a reflector, the semiconductor and the reflector being integrated by a resin; an antenna provided with a space from the reflector; and a rewiring layer provided on the surface of the integrated body, the rewiring layer including a rewiring line electrically coupling the semiconductor chip to the antenna. Further, a method for manufacturing a high-frequency module, the method includes forming an integrated body by integrating a semiconductor chip with a reflector by a resin; and forming a rewiring layer on the surface of the integrated body, the rewiring layer including a rewiring line electrically coupling the semiconductor chip to an antenna provided with a space from the reflector.

High-frequency module and method for manufacturing the same

A voltage controlled oscillator outputs an output signal whose frequency corresponds to inputted control voltage. A distributor distributes the output signal outputted from the voltage controlled oscillator. A plurality of injection-locked oscillators regulate self-oscillation frequencies according to the above frequency and output signals obtained by frequency-multiplying signals distributed by the distributor. A combiner combines and outputs the signals outputted from the plurality of injection-locked oscillators. This makes it possible to increase output power while preventing an operating band from narrowing.

High-frequency signal generation circuit, transmitter, and receiver

A semiconductor device includes a first electrode formed on a substrate, the first electrode being a first electrical potential; and a second electrode formed on the first electrode, the second electrode including a signal wiring that transmits a signal and a planar electrode part with a prescribed area. A shape of the first electrode corresponding to the planar electrode part is made into a slit shape such that a longitudinal direction of a slit is parallel to a direction in which the signal proceeds in the planar electrode part.

Semiconductor device

A termination circuit includes a pMOS transistor configured to have a source connected with a signal terminal outputting or inputting a transmission signal, a drain connected with a grounding line, and a gate receiving a control signal, the pMOS transistor being turned on when enabling a characteristic impedance matching function and being turned off when disabling the matching function; and an inductor and a capacitor configured to be connected with the signal terminal for matching characteristic impedance.

Termination circuit, semiconductor device, and test system

A pulse generator includes an oscillation circuit that generates a burst signal oscillated for ultrawideband band and a generation circuit that generates a trigger signal that causes oscillation by the oscillation circuit to be started.

Pulse generator and semiconductor integrated circuit

A semiconductor device has: a low concentration drain region creeping under a gate electrode of a MIS type transistor; a high concentration drain region having an impurity concentration higher than the low concentration drain region and formed in the low concentration drain region spaced apart from the gate electrode; and an opposite conductivity type region of a conductivity type opposite to the drain region formed in the low concentration drain region on a surface area between the high concentration drain region and the gate electrode, the opposite conductivity type region and low concentration drain region forming a pn junction.

Manufacture method of a high voltage MOS semiconductor device

A differential amplifier circuit includes a first/second field effect transistor including a gate coupled to a first/second differential input signal terminal, a source coupled to a reference potential node, and a drain coupled to a first/second differential output signal terminal, a first variable capacitor coupled between the gate of the first field effect transistor and the drain of the second field effect transistor, a second variable capacitor coupled between the gate of the second field effect transistor and the drain of the first field effect transistor, and a first envelope detector configured to detect an envelope of a signal at the first differential output signal terminal or the second differential output signal terminal, the first variable capacitor and/or the second variable capacitor has a capacitance that varies in accordance with an envelope detected by the first envelope detector.

Differential amplifier circuit

Breakdown voltage MOS semiconductor device

An amplifier circuit includes: a field-effect transistor including a first gate, a first source and a first drain, the first gate receiving one of differential signals, and the first source being connected to a reference potential node; a field-effect transistor including a second gate, a second source and a second drain, the second gate receiving the other of the differential signals, and the second source being connected to a reference potential node; a first transformer including a first inductor and a first secondary inductor which are magnetically coupled together, the first inductor being connected between the first drain of the first field-effect transistor and the second drain of the second field-effect transistor, and the first secondary inductor being connected between an output terminal and a reference potential node; and a first switch circuit connecting a power-supply potential node or a reference potential node to a midpoint of the first inductor.

Amplifier circuit and transceiver

For the purpose of achieving multiplexing of data signals for the channels of more than four in number in the generating of a frequency-divided clock signal using toggle flip-flop circuits (TFF), while avoiding any possible phase shift relationship between generated frequency-divided clock signals attributed to the indefinite initial state posing the inherent problem of the TFF, there is provided a clock generator circuit comprising a plurality of toggle flip-flop circuits connected in series, capable of outputting a pair of frequency-divided clock signals with different phases; and a delay circuit connected to the toggle flip-flop circuit, capable of outputting a clock signal with a phase shifted with respect to the phases of the pair of frequency-divided clock signal phases by delaying either one or both of the pair of frequency-divided clock signals being outputted from the toggle flip-flop circuits.

Clock generator circuit, signal multiplexing circuit, optical transmitter, and clock generation method

There is provided an amplifier circuit including a plurality of unit amplifiers connected in parallel to an input signal terminal, wherein each of the unit amplifiers includes: a first switch switching an input signal inputted from the input signal terminal; a first field effect transistor having a gate connected to the input signal terminal via the first switch and amplifying the input signal of the input signal terminal to output the amplified input signal; a second switch connected in parallel to the first switch and switching the input signal of the input signal terminal at a complementary timing to a switching timing of the first switch; and a capacitor connected to the input signal terminal via the second switch.

Growing community of inventors

Kawasaki, Japan

Toshihide Suzuki