Nec Corporation

Toshiaki Kitsuki

Akira Sawada

A search window of data blocks of a reference (viz., previous) frame is established in a search window memory for preparation for estimating displacement of a current data block of a current picture frame within the search window. The search window memory has memory capacity of two times that of the search window. The current picture frame is divided, in horizontal and vertical directions, into a plurality of data blocks which are sequentially written in a current block memory along each of horizontal lines according to a predetermined order of horizontal lines. A reference frame memory is accessed for writing data blocks in the search window memory for completing a search window for a current data block for preparing a part of a search window for a data block located on a horizontal line next to said given horizontal line when the current data block belongs to one of a predetermined number of last data blocks on said given horizontal line. On the other hand, the reference frame memory is accessed for writing data blocks in the search window memory for completing a search window for the current data block when the current data is located on the given horizontal line and outside of the predetermined number of last data blocks.

Method of reducing the number of access times to a reference frame

An adder restores an image data by adding an output of a reverse DCT portion and an output of a predicted value calculating portion to output to a macro-block buffer. Data temporarily stored in the macro-block buffer is written in a predicting dynamic memory per a unit of data of one word consisted of 2.times.2 blocks of luminance component (Y), 1.times.2 blocks of Cr component and 1.times.2 blocks of Cb components, via a memory data bus. A prediction reference block of the preceding frame stored in the predicting dynamic memory is output to a reference block buffer via the memory data bus. A restored image data of the preceding frame in the predicting dynamic memory is output to a line buffer via the memory data bus.

Moving picture decoding system

An LSI device for encoding an image includes a dot sequential access unit for sequentially storing in an external storage image data arranged in a dot sequential manner, a block data output device for outputting block data from the storage, the block data including the pixel data of a predetermined number of lines and a predetermined number of columns, and a vertical decimating unit for conducting a vertical decimating operation for the block data. The LSI device employs only one memory to achieve the decimating operation and the blocking operation. As a result, the number of pins of the device and the size thereof can be decreased.

LSI encoding device with pixel data blocking and vertical decimating

A discrete cosine transformation processor subjects a plurality of input data to addition or subtraction at an adder/subtracter with two combinations according to the control signal every clock pulse so as to output a plurality of combination data. The combination data are assigned to eight groups according to certain combinations and each of them is input to one of eight selection circuits. The selection circuit selects one data from the combination input data according to the control signal and outputs the selected data every clock pulse. A multiplier receives the data selected by the selection circuit and multiplies it by a predetermined coefficient every clock pulse. Further, a second adder/subtracter subjects the output data from the multiplier to addition or subtraction in different combinations according to the control signal to determine cosine transformation coefficient to inverse cosine transformation coefficients.

Growing community of inventors

Tokyo, Japan

Toshiaki Kitsuki