Kabushiki Kaisha Toshiba

Toshiaki Idaka

Susumu Shuto

Hirokazu Ezawa

Masahisa Sonoda

Kazuyuki Yahiro

Miwa Tanaka

Katsuya Okumura

Seiichi Mori

Hiroaki Tsunoda

Hideshi Miyajima

Riichirou Aoki

Hideaki Masuda

Hitoshi Araki

Toshinori Shinki

Kenichi Sasaki

Disclosed is a semiconductor device manufacturing method in which a silicon nitride film is formed to cover an n-channel transistor formed on a semiconductor substrate and to apply a tensile stress in a channel length direction to a channel of the n-channel transistor, the method includes: forming a first-layer silicon nitride film above the n-channel transistor; irradiating the first-layer silicon nitride film with ultraviolet radiation; and after the ultraviolet irradiation, forming at least one silicon nitride film thinner than the first-layer silicon nitride film above the first-layer silicon nitride film. Silicon nitride films formed to apply the tensile stress is formed by respective steps.

Semiconductor device manufacturing method and semiconductor device

A method for fabricating a semiconductor device includes forming a dielectric film containing a porogen material above a substrate; removing a portion of the porogen material contained in the dielectric film so as to make a concentration of the porogen material higher in a part on a lower side of the dielectric film than in another part on a higher side of the dielectric film; forming an opening halfway in the dielectric film from which a portion of the porogen material has been removed to leave the dielectric film below a bottom of the opening; removing or polymerizing a remainder of the porogen material contained in the dielectric film; and etching the bottom of the opening after removing or polymerizing the remainder of the porogen material.

Method for fabricating a semiconductor device

Anneal technique for reducing amount of electronic trap in gate oxide film of transistor

Insulating film for use in semiconductor device

A method of manufacturing bump electrodes with a larger top surface area than bottom surface area is disclosed. First, an organic layer is deposited. Then holes and grooves partially surrounding the holes are formed in the organic layer. Next, heat is applied to the organic film, causing the organic film to shrink. This causes the openings to expand at the top away from the grooves partially surrounding the holes. Metallic bumps are then deposited within the holes.

Semiconductor process for forming bump electrodes with tapered sidewalls

Pads are formed on a semiconductor substrate and the pads are covered with a passivation film. Openings are formed in the passivation film and the pads are exposed via the openings. A barrier metal layer is formed on the bottom surface and side surface of each of the openings and the upper surface of the passivation film lying on the periphery of each of the openings. Bump electrodes are filled in the openings and project upwardly from the openings. The area of the upper surface of the bump electrode is larger than the area of the bottom surface thereof connected to the pad. The cross section of the bump electrode in a direction along the periphery of the semiconductor substrate takes a rectangular form and the cross section of the bump electrode in a direction perpendicular to the periphery of the semiconductor substrate takes a trapezium form having an upper side longer than a bottom side thereof.

Semiconductor device having bump electrodes with a trapezoidal

A semiconductor device and a method of manufacturing the same wherein first and second wirings with an interlayer insulating film interposed therebetween are connected through a contact hole formed in the interlayer insulating film. In the semiconductor device, the first and second wirings are connected via a low resistive, conductive metal layer obtained by reducing a highly resistive oxide layer with a highly oxidizing metal, the highly resistive oxide layer being exposed within the contact hole on the surface of the first wiring. In the method of manufacturing a semiconductor device, a contact hole is opened in the interlayer insulation on the first wiring, a highly oxidizing metal is deposited on the highly resistive oxide layer on the surface of the first wiring within the contact hole, and the highly resistive oxide layer is reduced with the highly oxidizing metal to change the highly resistive oxide layer to a low resistive, conductive metal layer. The second wiring is connected to the first wiring via the conductive metal layer. The reduction may be carried out before or after depositing the second wiring, or at the time when the highly oxidizing metal is deposited.

Semiconductor device and method of manufacturing the same

Growing community of inventors

Kanagawa-ken, Japan

Toshiaki Idaka