Fujitsu Corporation

Toshi Ikezawa

Kiichi Matsuda

Toshitaka Tsuda

Takeshi Okazaki

Michinobu Ohhata

Masao Yamasawa

Hirokazu Fukui

Shin-ichi Maki

Hirohisa Gambe

Shin-Ichi Maki

A differential coding circuit including a subtracter, a quantizer for quantizing a differential signal from the subtracter, and a predicted signal generating circuit for generating a predicted signal on the basis of a quantized differential signal from the quantizer. The subtracter subtracts the quantized differential signal of the quantizer and the predicted signal from the sampled input signal. The critical path of the circuit is shortened, therefore the operation speed of the differential coding circuit increases.

Differential coding circuit with reduced critical path applicable to DPCM

A codec, utilized for an PCM transmission system, has an a/d and d/a converter, and a digital phase locked loop circuit. The digital phase locked loop circuit generates internal operation clocks, which are used for the a/d and d/a converting operations, by dividing the frequency of the applied external clocks by a value determined in accordance with the frequency ratio between frame pulses and the external clocks.

A/D, D/A Converter for PCM transmission system

Growing community of inventors

Yokohama, Japan

Toshi Ikezawa