Semiconductor Components Industries, LLC

Sanyo Semiconductor Co., Ltd.

Toru Odajima

Masahiro Obuchi

Shinya Inaba

Masashi Aramomi

To adjust a tuning frequency without an output being muted while an oscillation frequency is adjusted. A tuning circuit includes a pair of an inductor and a tuning variable capacitor unit, adjusts a tuning frequency by changing a capacitance of the tuning variable capacitor unit, and obtains a tuning signal having a limited band from a received signal. The tuning circuit includes an oscillating inductor that passes a current corresponding to the tuning signal, an oscillating variable capacitor unit that adjusts the oscillation frequency of a system including the oscillating inductor, and a controller that changes a capacitance of the oscillating variable capacitor unit correspondingly to a desired tuning frequency while adjusting the capacitance such that the oscillation frequency corresponds to the desired tuning frequency, and adjusts a capacitance of the tuning variable capacitor unit in accordance with the adjusted capacitance of the oscillating variable capacitor unit.

Tuning circuit

An audio signal processing circuit comprising: a modulation circuit configured to output a modulated signal of a frequency corresponding to an input audio signal; a drive circuit configured to generate a driving current for driving the modulation circuit based on a control signal; an audio detection circuit configured to detect presence or absence of the audio signal input to the modulation circuit; and a control signal generation circuit configured to generate the control signal for generating the driving current in the drive circuit when the presence of the audio signal is detected and generate the control signal for stopping generation of the driving current in the drive circuit when the absence of the audio signal is detected for a predetermined period, based on a detection result of the audio detection circuit.

Audio signal processing circuit

An audio signal processing circuit comprising: a holding circuit configured to receive a clock signal and set data corresponding to the clock signal, and to hold the set data; a processing circuit configured to process at least one of a first audio signal and a second audio signal input in parallel, based on the set data of the holding circuit; and a set data output circuit configured to output the clock signal to the holding circuit based on the first audio signal corresponding to the clock signal, and output the set data to the holding circuit based on the second audio signal corresponding to the set data.

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Oota, Japan

Toru Odajima