Fujitsu Corporation

Fujitsu Frontech Limited

Nippon Sheet Glass Company, Limited

Toru Maniwa

Manabu Kai

Takashi Yamagajo

Andrey S Andrenko

Yasuyuki Oishi

Hiroyuki Hayashi

Hiroyoshi Ishikawa

Shunji Baba

Kazuo Nagatani

Tokuro Kubo

Shigekazu Kimura

Hajime Hamada

Nobukazu Fudaba

Takeshi Takano

Kazuhiko Kobayashi

Kazunori Yamanaka

Tsuyoshi Hasegawa

Yoshiyasu Sugimura

Naofumi Okubo

Hiroshi Kurihara

Shigeru Hashimoto

Nobuhisa Aoki

Shuji Kobayakawa

Yoshihiko Asano

Tomoya Ota

Yoshimasa Daido

Takayoshi Ode

Alexander Nikolaevich Lozhkin

Yuichi Utsunomiya

Akihiko Akasegawa

Toshiaki Ibi

Akihide Sano

Yoshihiro Kawasaki

Hiroyuki Seki

Toshio Kawasaki

Teruhisa Ninomiya

Yoji Ohashi

Ken Tamanoi

Atsushi Honda

Takenori Ohshima

Yuichi Nakanishi

Takashi Yamagajp

A signal processing device includes: a first subarray that includes power amplifiers and phase shifters and that forms a first beam facing in a first direction; a second subarray that includes power amplifiers and phase shifters and that forms a second beam facing in a second direction; a feedback unit that feeds back at least signals that are output from the power amplifiers included in the first subarray; and a processor that is connected to the first subarray and the second subarray. The processor executes a process including: generating, based on a first feedback signal and a transmission signal output to the first subarray, a cancellation signal corresponding to an interference component applied to the second beam by the first beam; and adding the generated cancellation signal to a transmission signal output to the second subarray.

Signal processing device and inter-beam interference suppression method

A wireless communication apparatus includes: a processor that performs distortion compensation on a complex number transmission signal by using a distortion compensation coefficient; a power amplifier that amplifies the transmission signal subjected to distortion compensation by the processor; and a feedback path that feeds back a signal output from the power amplifier to supply a real number feedback signal to the processor. The processor executes a process including: estimating a complex number feedback signal by performing linear computation on the complex number transmission signal and the real number feedback signal; and updating the distortion compensation coefficient by using the estimated complex number feedback signal.

Wireless communication apparatus and coefficient updating method

A multiantenna communication device forms a directional beam by adding an antenna weight to respective signals of a plurality of antenna elements. The multiantenna communication device includes: a processor that executes performing distortion compensation on a transmission signal by using a distortion compensation coefficient; a plurality of power amplifiers that are provided corresponding to the antenna elements, and that amplify the transmission signal subjected to the distortion compensation by the processor; a multiplexer that multiplexes signals output from the power amplifiers to feed back; and an analog/digital (A/D) converter that A/D converts a multiplex feedback signal that is obtained by the multiplexer, wherein the processor executes updating the distortion compensation coefficient by using the multiplex feedback signal A/D converted by the A/D converter and the transmission signal.

Multiantenna communication device and coefficient update method

An amplifying apparatus, including an amplitude-phase conversion unit to separate an input signal into first and second signals, wherein a phase difference between the first and second signals depends on an amplitude of the input signal, a first amplifying unit, a first matching circuit including a main line and a first harmonic processing circuit, wherein a length of the line of the first harmonic processing circuit short-circuits a harmonic, a second amplifying unit, a second matching circuit including a main line and a second harmonic processing circuit, wherein a length of the line of the second harmonic processing circuit short-circuits a harmonic, and an output synthesis unit to synthesize outputs from the first and second matching circuits, wherein a distance from the first amplifying unit to the first harmonic processing circuit differs from a distance from the second amplifying unit to the second harmonic processing circuit.

Amplifying apparatus

An amplifier includes: an amplifying device configured to amplify an input signal; and a matching circuit coupled to the amplifying device, and including an impedance transformer and a parallel resonance circuit coupled to a wiring which spans from the impedance transformer to the amplifying device, wherein a circuit length of the impedance transformer is longer than one-fourth of wavelength of an electronic wave having a frequency which is substantially equal to a resonance frequency of the parallel resonance circuit.

Amplifier and amplifying method

An amplifier includes a signal processing circuit configured to generate an orthogonal signal orthogonal to an input signal; a first D/A converter configured to convert the orthogonal signal into a first analog signal; a second D/A converter configured to convert the input signal into a second analog signal; and an analog computing circuit configured to generate a constant envelope signal based on the first analog signal from the first D/A converter and the second analog signal from the second D/A converter.

Amplifier

A first amplification section and a second amplification section included in an amplification apparatus amplify two constant amplitude signals generated by vector decomposition. An impedance inverting circuit inverts the impedance of the signal amplified by the second amplification section. A combining circuit corrects the phases of the signal amplified by the first amplification section and the signal whose impedance is inverted by the impedance inverting circuit, and combines and outputs these signals. The combining circuit includes a line which is (&#x3bb;/4)+&#x3b3; in length and which is an asymmetrical circuit element and a line which is (&#x3bb;/4)&#x2212;&#x3b4; in length and which is an asymmetrical circuit element.

Amplification apparatus

A power amplifier includes a first matching circuit configured to perform harmonic processing of an input signal, and a second matching circuit configured to perform the harmonic processing of an output signal, the output signal being generated by amplifying a power of the input signal. The power amplifier rotates a phase of output impedance at a matching point of the harmonic included in the generated output signal when the power of the input signal is decreased from a value higher than a certain value to a value lower than the certain value.

Power amplifier

An amplifier includes an amplifying element that amplifies an input signal; an output terminal that outputs the signal amplified by the amplifying element; a matching circuit disposed in series between the amplifying element and the output terminal, and performing impedance matching; an impedance converter disposed in series between the amplifying element and the matching circuit or between the matching circuit and the output terminal; and a first resonator and a second resonator connected at the ends of the impedance converter.

A tag patch antenna includes: a slit formed in the vicinity of an edge of an antenna pattern along a part of the edge; and a feeding point to which a tag LSI is connected and which is formed by cutting an intermediate portion of the part of the edge separated by the slit from a body of the antenna pattern by a width of the slit.

Tag patch antenna and RFID tag using tag patch antenna

A metal pipe includes a slot having a predetermined length in a longitudinal direction of the metal pipe and a wireless tag that is placed inside the metal pipe and includes a power feeding unit to feed electric power to the slot and an IC chip connected to the power feeding unit, thereby functioning as an antenna of the wireless tag. The metal pipe is thus managed by the wireless tag.

Metal pipe managed by wireless tag and wireless tag

An amplifier includes a first amplification element configured to amplify a first signal in one of first and second operation classes, a second amplification element configured to amplify a second signal in one of first and second operation classes, a first transmission line through which the amplified first signal is transferred, and a coupler configured to couple the transferred first signal and the amplified second signal, wherein the first amplification element amplifies the first signal in the first operation class and the second amplification element amplifies the second signal in the second operation class, when the first signal and the second signal have a first frequency band, and wherein the first amplification element amplifies the first signal in the second operation class and the second amplification element amplifies the second signal in the first operation class, when the first signal and the second signal have a second frequency band.

A metal-resistant radio frequency tag that has a broader band pass band (frequency versus communication range) characteristic compared to conventional techniques is achieved. For this purpose, the radio frequency tag according to the present invention includes a first resonator pattern, the first resonator pattern including a chip connecting section to which a chip is to be connected, and an inductance section that is capable of adjusting an impedance matching with the chip; and a second resonator pattern that is fed through electromagnetic induction coupling via the inductance section.

Radio frequency tag and method of manufacturing the same

The wireless tag includes an antenna conductor; a first power-supply conductor which is electromagnetic-inductively coupled with the antenna conductor; and a second power-supply conductor which is loop-shaped and which is electrically coupled with the first power-supply conductor.

Wireless tag and method for producing wireless tag

An RFID tag having a tag antenna and an LSI chip, comprising: a power-supply pattern on which the LSI chip is mounted; a patch antenna that functions as the tag antenna; and a high-frequency connection section that makes a high-frequency connection between the power-supply pattern and the patch antenna. The high-frequency connection section is formed, for example, by forming a slot in the patch antenna, layering one end of a small dipole antenna that functions as the power-supply pattern over the slot so that it crosses over the slot, and supplying power from the small dipole antenna to the patch antenna.

Growing community of inventors

Kawasaki, Japan

Toru Maniwa