Fujitsu Corporation

Toru Fukui

Chikai Ono

Osamu Nomura

Michiyuki Hirata

Susumu Terawaki

A level conversion circuit includes a level converter and a buffer gate circuit. A level converter includes two pairs of P-channel MOS transistors. A first input signal is supplied to one of the pair of P-channel MOS transistors and a second input signal is supplied to one of the other pair of P-channel MOS transistors. Each of the first and second input signals are complementary ECL-level signals. The buffer gate circuit includes two BiCMOS circuits. A first output signal from one of the pairs of P-channel MOS transistors is supplied to a gate of an N-channel MOS transistor provided in one of the BiCMOS circuits. A second output signal from the other pair of P-channel MOS transistors is supplied to a gate of an N-channel MOS transistor provided in the other BiCMOS circuit. The first input signal is supplied directly to a gate of a P-channel MOS transistor provided in one the BiCMOS circuits. The second input signal is supplied directly to a gate of a P-channel MOS transistor provided in the other BiCMOS circuit. A first TTL-level output signal is output from one of the circuits, and a second TTL-level output signal is output from the other BiCMOS circuit.

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Seto, Japan

Toru Fukui