Nordic Semiconductor Asa

Tor Øyvind Vedal

Ola Bruset

Sverre Wichlund

Carsten Wulff

Ruben Undheim

Stein Erik Weberg

Harald Garvik

Shankkar Balasubramanian

Henrik Fon

According to an aspect, there is provided an all-digital phase-locked loop, ADPLL, for a radio receiver, transmitter or transceiver. The ADPLL comprises a time-to-digital converter for generating a digital time signal based on an external reference clock signal and a feedback signal, a switched capacitor digitally controlled oscillator, SC-DCO, for generating a radio frequency signal used as the feed-back signal, a phase-locked loop for controlling the SC-DCO based on the digital time signal for achieving a phase and frequency lock and digital processing means. The digital processing means are configured to maintain, in at least one memory, a lookup table defining a plurality of switching configurations of the SC-DCO corresponding to a plurality of frequencies of the radio frequency signal and to cause the phase-locked loop controller to adjust the switching configuration of the SC-DCO according to the lookup table.

Fast-locking all-digital phase-locked loop and applications thereof

There is provided a method of testing an RF transceiver circuit and an RF transceiver circuit arranged to be operable in a test mode including a transmitter circuit portion and a receiver circuit portion, the receiver circuit portion including a mixer. The method involves the transmitter circuit portion generating a modulated signal and the receiver circuit portion receiving a continuous radio frequency wave. The mixer mixes the modulated signal with a signal derived from the continuous radio frequency wave to produce an output. A remainder of the receiver circuit portion processes the output of the mixer.

Testing RF transmitters and receivers

A circuit portion comprising a clock domain is disclosed. A first clock is arranged to clock components in the clock domain. An analogue to digital converter is clocked by a second clock with a duty cycle. The second clock is derived from the first clock. The analogue to digital converter is arranged to output a feedback signal upon finishing a conversion of a sample, and the feedback signal is arranged to control the duty cycle.

Control of analogue to digital converters

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Trondheim, Norway

Tor Øyvind Vedal