Sony Corporation

Nsk Corporation

Tooru Ueda

Daisuke Gunji

Yasuyuki Matsuda

Tetsu Takehara

Hiroyasu Yoshioka

Kazutaka Tanaka

Tomoharu Saito

Masafumi Hikida

Yuka Kaneko

A rotation transmission device having a high torque measurement resolution is provided. The rotation transmission device is provided with: a rotary-shaft unit () having a first and second rotary shaft () combined so as to be coaxial and such that the end sections thereof can rotate relative to each other and a torsion bar () that is provided on the inner-diameter side of the first and second rotary shafts so as to be coaxial therewith, has one end section connected to the first rotary shaft (), and has the other end section connected to the second rotary shaft (); a first gear () fastened to the outer peripheral surface of the first rotary shaft (); a second gear () fastened to the outer peripheral surface of the second rotary shaft (); a coupling shaft () provided on the inner-diameter side of the torsion bar () so as to be coaxial therewith, having one end section connected to one rotary shaft (), and having the other end section protruding from an end of the torsion bar () in the axial direction; a first encoder disposed and fixed on the other end of the coupling shaft () so as to be coaxial with the first rotary shaft () and having a first detected section (); a second encoder fastened on the other end of the second rotary shaft () so as to be close to the first encoder and having a second detected section (); and a sensor unit having at least one sensor () that faces the first and second detected sections ().

Rotation transmission device

A multi-port type semiconductor memory device which can reduce the number of bit lines, the size of a memory, and the power consumption, wherein write and read operations are carried out by using a pair of bit lines in common; at the time of a write operation the levels of the bit lines are determined in response to write data, and the levels of first and second memory nodes are determined via a writing port WPT and maintained by latch circuits; at the time of a read operation, in response to the levels of the first and the second memory nodes, the levels of the bit lines are determined via a first and a second reading ports and read data is output in accordance with the levels of the bit lines by a sense amplifier.

Memory system having multiple reading and writing ports

Growing community of inventors

Fujisawa, Japan

Tooru Ueda