Kabushiki Kaisha Toshiba

Toshiba Electronic Devices & Storage Corporation

Tong Wang

Toshiya Mitomo

Tetsuro Itakura

Masahiro Hosoya

Tuan Thanh Ta

Shigehito Saigusa

Shusuke Kawai

Yuta Tsubouchi

An amplifier circuitry includes a first amplifier, a second amplifier, a voltage generating circuitry, and a control circuitry. The first amplifier circuitry configured to amplify a first signal. The second amplifier circuitry configured to amplify a second signal which forms differential signals together with the first signal. The voltage generating circuitry configured to generate at least one of a first bias voltage to be applied to the first signal and a second bias voltage to be applied to the second signal. The control circuitry configured to control the voltage generation circuitry so as to decrease a difference between a DC component of an output of the first amplifier circuitry and a DC component of an output of the second amplifier circuitry.

Amplifier circuitry and voltage correction circuitry

An amplifier includes a first circuitry, a second circuitry, and a plurality of amplifier circuitries. The first circuitry controls an enable signal. The second circuitry controls a bias signal. Circuitries which output signals are decided from among the plurality of circuitries based on the enable signal, and each of the circuitries which output the signals amplifies an input signal with a gain corresponding to the bias signal.

Amplifier circuitry and method of amplification

A power amplifier includes an output signal generator constructed to generate, on the basis of an input AC signal, an output signal including, in cycles, a first pulse being width higher in voltage than a first reference voltage and a second pulse being width lower in voltage than the first reference voltage and a feedback circuit constructed to generate a first bias signal corresponding to the output signal and feed back the first bias signal to an input side of the output signal generator to equalize a width of the first pulse and a width of the second pulse in the cycles of the output signal.

Power amplifier and wireless communication device

A receiving circuit includes a first inductor, a second inductor, a capacitor and an amplifier. The first inductor includes a first terminal and a second terminal. The second inductor includes a third terminal and a fourth terminal. The first terminal is configured to couple with an antenna for receiving a first electrical signal corresponding to an electromagnetic wave received by the antenna. The second terminal is configured to output a second electrical signal based on the first electrical signal. The first capacitor includes a fifth terminal coupled to the third terminal and a sixth terminal coupled to the fourth terminal. The amplifier is coupled to the second terminal and configured to amplify the second electrical signal.

Receiving circuit and wireless communication device

A wireless communication device includes a signal generator supply a signal to an input node to which a power amplifier is connected. The power amplifier includes an inverter including a first transistor with a gate connected to the input node via a first signal path and a second transistor with a gate electrode connected to the input node via a second signal path. An output signal corresponding to the signal supplied to the input node is supplied from an output node between the first and second transistors. A filter is connected to the output node and outputs a filtered signal having a high frequency component removed. A bias application unit applies a first bias voltage to the first signal path and a second bias voltage to the second signal path. Levels of the bias voltages being set according to a direct current component in the filtered signal.

Wireless communication device and wireless communication method

A bias circuit according to an embodiment is a bias circuit that supplies a bias voltage to an amplifying element. The bias circuit of the embodiment includes a first current source that has a characteristic of varying an output current with the surrounding temperature variations, and a second current source that has a different output characteristic from the first current source and that can control the output current. The bias circuit of the embodiment also includes a comparator for comparing the output current of the first current source with the output current of the second current source, and a bias supply part that controls the output current of the second current source on the basis of the comparison result of the comparator and supplies a bias voltage to the amplifying element in accordance with the comparison result.

Bias circuit and amplifier

A transmit-receive switching circuit provided between a transmitter circuit configured to generate a transmission signal to be transmitted from an antenna and a receiver circuit configured to receive a reception signal received by the antenna, a transistor input control circuit configured to make the transmitter generate a transmission signal by an amplifying operation of a transistor in an output stage of the transmitter circuit when the transmission signal is transmitted from the antenna, and to short-circuit an output terminal of the transmitter circuit to a ground voltage when the reception signal is received by the antenna.

Transmit-receive switching circuit and wireless device

An example frequency converting circuit generates a multiplied signal obtained by multiplying a local signal by an amplified signal generated by an amplifying portion. The frequency converting circuit includes a converter which converts the amplified signal into a current signal and a switching circuit which multiplies the current signal by the local signal and generates the multiplied signal. An impedance element supplies a first direct current from the amplifier and a second direct current from the switching circuit to the converter.

Frequency converting circuit, signal processing circuit and receiver

There is provided a high-frequency differential amplifier circuit comprising: a first MOS transistor, a second MOS transistor, a first positive feedback element and a second positive feedback element. The first MOS transistor and the second MOS transistor each has a source connected to a first power source and a drain connected through loads to a second power source. The first and second MOS transistors receives at their gates, first and second input signals having phases reverse to each other. The first positive feedback element includes a first capacitor and a first variable resistance connected in series between the gate of the first MOS transistor and the drain of the second MOS transistor. The second positive feedback element includes a second capacitor and a second variable resistance connected in series between the gate of the second MOS transistor and the drain of the first MOS transistor.

High-frequency differential amplifier circuit

According to one embodiment of the present invention, there is provided a high-frequency switching circuit including a first differential line and third line. The differential line includes a first line configured to have one end and an other end, a second line configured to have one end and an other end and a first switch configured to switch electrical connection between the one ends of the first and second lines. The differential line receives or outputs differential signals by the other ends of the first and second lines. The third line is configured to be electromagnetically coupled with the first differential line when the first switch is turned on. The first switch is arranged at a position where an electrical length from the other end of the first line and an electrical length from the other end of the second line are approximately equal.

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Kawasaki, Japan

Tong Wang