Hughes Electronics Corporation

Tong-Jyh Lee

Arnold L Berman

Michael I Mandell

Wei-Chun Wang

A unique transistor model and methods for analyzing the model are disclosed. The transistor model of the present invention is simple and requires specification of a minimal number of parameters to simulate transistor operation. Three analysis methods are disclosed, each having unique circumstances for application A first method is premised on sampling all waveforms in the circuit and determining the operating point of the transistor. The first method assumes an input of an arbitrary periodic waveform. The first method is very flexible and may be used with a wide range of models other than the disclosed model. A second and a third method are premised on input and output waveform clipping. The second method assumes a single tone input into the transistor. The third method is a combination of features from the first and second methods. The third method is computationally efficient and assumes an arbitrary periodic input waveform.

Transistor amplifier model and circuit analysis methods

An algorithm (20) or method (20) for verifying that a system hierarchically built from smaller components implements a desired equation that represents the system. Symbolic data is clocked (24) through the system by processing a symbolic test vector using linked equations (22) written (21) for each component of the system. A resulting symbolic equation generated at the output of the system is recorded (25). The symbolic equation is then compared (26) with the desired equation for the system using a symbolic manipulation tool. If the comparison generates a zero difference, the system correctly implements the desired equation representative of the system, and vice-versa.

Architectural equation generating algorithm

An automatic and iterative simulation method for adjusting linearizer parameters to achieve desired AM/AM and AM/PM characteristics is disclosed. The disclosed method includes the steps of choosing a set of linearizer parameters, modeling the performance of the linearizer circuit and the power amplifier to calculate a performance index. The performance index is compared to a threshold. The method continues to iterate until the performance index is acceptable in comparison to the threshold. When the process is completed, the linearizer parameters are output for use by the designer. The disclosed method eliminates the need to engage in trial and error methods in a laboratory when combining a linearizer and a power amplifier to produce linear output characteristics.

Growing community of inventors

Hermosa Beach, CA, United States of America

Tong-Jyh Lee