Silicon General Corporation

Toney Warren

Steven Johnson

The circuitry of the present invention taps a DS0 data stream and outputs a timing signal to drive terminal multiplexers. Even if the data bit stream is lost, the present invention continues to provide proper clocking signals. A composite clock (bit and byte clock) is provided by the present invention with the bit clock at 64 KHz and the byte clock at 8 KHz in the preferred embodiment. To avoid the problem of phase shift over long distances (limiting cable length) the present invention phase adjusts the digital bit stream clocking signal with a 360 degree delay, giving the appearance of advancing the signal in phase. An additional delay of one frame width is applied to the signal. A negative phase delay equivalent to cable runs from 0-1500 feet in 500 foot increments is also applied. In the preferred embodiment, a shift register is tapped in reverse order to accomplish this phase delay.

Timing generator

The present invention provides a clock holdover circuit which will provide a replacement clock signal within predetermined parameters independently of time and temperature variations. The circuit of the present invention has only a single component which is time and temperature dependent. By selecting the components parameters to be within the desired tolerances, the accuracy of the circuit is maintained. In the present invention, digital circuitry is combined with an accurate local crystal frequency source to provide a replacement clock signal. The present invention allows phase consistency upon loss of a reference clock signal as well as on return of the reference clock signal. A reference clock signal is phase locked to a VCO to produce a desired output. The frequency of the output is compared to a local frequency standard to generate an offset frequency used to control a frequency synthesizer. The offset frequency is digitally stored. Upon loss of the reference clock signal, the stored offset frequency is used to drive the frequency synthesizer along with the local frequency standard so as to provide an acceptable replacement clock signal. The frequency comparator, storage, and synthesizer are all digital so as to be time and temperature independent. The local frequency standard is crystal based having known time and temperature tolerances. By choosing a local frequency standard having tolerances within a predetermined range, an acceptable clock holdover signal may be provided indefinitely. The replacement clock signal is phase compared to the reference clock signal so that no loss of phase occurs upon reference loss.

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Livermore, CA, United States of America

Toney Warren