Fujitsu Corporation

Tomoyuki Yamaguchi

Naoki Aihara

Jyoei Kamoi

Iwao Tada

Yasuyuki Mitsumori

Mikio Nakayama

Satoshi Fukui

Yuzo Okuyama

Hichiro Hayami

Tadashi Hoshino

Takashi Tabu

Shinji Wakasa

Hiroyuki Shimono

Toshiharu Sakai

Toshikazu Ota

Masami Hashizume

A transmission base flow control device including a first credit counter, shared by an active system and a preparatory system of a reception device, managing a credit value of the active system; a second credit counter and a third credit counter counting the credit values for each system of the active system and the preparatory system of the reception device; a differential counter holding a difference between the credit value counted by the second credit counter and the credit value counted by the third credit counter; and a control unit matching, according to the difference held by the differential counter, the credit values of the first credit counter and the second credit counter or the credit values of the first credit counter and the third credit counter with a credit value corresponding to the reception device of a new active system after switching the system of the reception device.

Transmission base flow control device

A method and system including ATM switching equipment provided for switching between a working channel and a protection channel in an ATM network. The method and system include the following processes: In each cell for transmission providing an indication of whether the cell belongs connection currently in a working state via a working channel; cells are duplicated on each connection basis; the duplicated cells are transmitted simultaneously on both a working channel and a protection channel; and valid cells are selected from received cells according to the indication in each cell indicating whether the relevant connection is currently in a working state.

ATM switching system and method for switchover between working channel and protection channel in an ATM network

To reduce a scale of the circuit, a number of the external terminals, processing steps in developing a firmware, and a scale of the firmware, a line terminator provided in a device for terminating SONET/SDH lines, each having a different line speed, terminates plural lines, each having a different line speed, and includes a clock generator generating a clock corresponding to each line speed, a line switching circuit for specifying one of the plural lines, a selector for outputting data of one of the plural lines, which is specified by the line switching circuit, and a common processing circuit for processing data of the one line output from the selector, according to a clock corresponding to the line speed generated in the clock generator.

Line terminating device

An apparatus for pass control of transmission cells for preventing cells having headers including a specific pattern of multi-bit error from being erroneously transmitted. The pass control apparatus is operated by a method comprising (i) a step of monitoring a communication quality of each received frame; (ii) a step of temporarily buffering one monitored frame's worth of cells for each frame; (iii) a step of determining whether or not the communication quality of the monitored frame exceeds a predetermined threshold level; and (iv) a step of erasing all of the cells including one-bit error and multi-bit error in their headers from one frame's worth of buffered cells when the communication quality deteriorates exceeding the predetermined threshold level, while passing the buffered cells as they are when it does not exceed the threshold level.

Method and apparatus for achieving pass control of transmission cells

The invention concerns an ATM exchange, and is directed in particular to the provision of a cell bandwidth control apparatus for performing bandwidth control for ATM cells sent from the ATM exchange onto the line side. The cell bandwidth control apparatus includes forced empty cell inserting means for forcibly inserting empty cells in a highway connected to an ATM switch. The forced empty cell inserting means inserts forced empty cells in an outgoing highway leading from the ATM switch to a line adapter and thereby limits the line bandwidth of the outgoing highway to within the bandwidth of the line accommodated in the line adapter.

Cell bandwidth control apparatus

An identifier translation apparatus is provided that does not require a prohibitively large memory capacity and that is simple in construction and capable of increasing the speed of processing. Using an address consisting of a VPI and the high-order 6 bits of a VCI, a first-stage table is read to retrieve a block number, and using an address consisting of the retrieved block number and the low-order 6 bits of the VCI, a second-stage table is read to retrieve a routing tag. The routing tag is then appended to a cell.

Identifier translation apparatus

A plurality of input lines are respectively connected to separate multiplexing units that are connected in cascade by cascading lines. Select signals are transferred in parallel with fixed length packets over the cascading lines. Each separate multiplexing unit is responsive to a select signal received from the cascading line to select one of fixed length packets received over the corresponding input line and the upstream cascading line and output it over the downstream cascading line. The most downstream separate multiplexing unit provides a multiplexed output of the input lines.

Line multiplexing system

In a synchronous transfer mode/asynchronous transfer mode converting transmission path terminating apparatus, a receive synchronous transfer mode processing unit has an out of synchronization detecting unit for detecting out of synchronization information, and an asynchronous transfer mode cell extracting unit has an asynchronous transfer mode cell synchronizing unit for forcibly outputting a signal representing out of synchronization when receiving the out of synchronization information from the out of synchronization detecting unit, an asynchronous transfer mode cell discard judging unit for forcibly outputting a cell discard signal when receiving the out of synchronization information from the out of synchronization detecting unit, and a storage write controlling unit for forcibly inhibiting an asynchronous transfer mode cell from being written in a storage unit when receiving the out of synchronization information from the out of synchronization detecting unit, thereby always capturing accurate data (cells) to continue a process even immediately after generation of an alarm such as an SEF signal, besides transferring error information used to accurately switch a transmission path so as to prevent unnecessary switching of the transmission path.

Growing community of inventors

Kawasaki, Japan

Tomoyuki Yamaguchi