Hitachi, Ltd.

Other

Hitachi Automotive Engineering Co., Ltd.

Tomoyuki Tanaka

Mutsuhiro Mori

Yasumichi Yasuda

Yasunori Nakano

Masahiro Okamura

Takuzo Ogawa

Kenichi Onda

Naoki Sakurai

Toshikatsu Shirasawa

Masahiro Matsumoto

Hideki Miyazaki

Nobutake Konishi

Sadayasu Ueno

Yasuo Matsuda

Masayuki Miki

Norikazu Tokunaga

Tsutomu Yatsuo

Tatsuya Kamei

Seiko Suzuki

Shin Kimura

Yutaka Misawa

Norio Ichikawa

Shigeki Tsuchitani

Masayoshi Suzuki

Kanemasa Sato

Masanori Kubota

Kouzou Watanabe

Hiromichi Ebine

Masayuki Wada

Yasuhiro Asano

Yukiko Sugisawa

Toshiki Kurosu

The present invention is directed to a semiconductor device which can achieve high current density and which has a high reliability. In the insulated gate semiconductor device according to the present invention, a plurality of insulating gates are provided, with each two adjacent insulating gates being spaced from each other, the insulating gates being provided on a second semiconductor region of a first conductivity type. A first semiconductor region, of the same or different conductivity type from that of the second semiconductor region, extends from a surface of the second semiconductor region opposed to the surface thereof having the insulating gates thereon. A plurality of third semiconductor regions are provided in the second semiconductor region, between the insulating gates and aligned therewith, and two fourth semiconductor regions are provided extending into each of the third semiconductor regions, aligned with the sides of adjacent insulating gates. Electrodes are respectively provided in contact with the first semiconductor region and in contact with the third and fourth semiconductor regions, the electrode in contact with the third and fourth semiconductor regions contacting such regions in the space between adjacent insulating gates. By utilizing such aligned third and fourth semiconductor regions, an insulated gate semiconductor device which operates at high current densities can be fabricated at high accuracy, and such device will be less influenced by parasitic bipolar transistor effects.

Vertical insulated gate semiconductor device having high current density

A semiconductor acceleration sensor is formed by a cantilever having a conductive movable electrode of predetermined mass at one end, at least one pair of fixed conductive electrodes which are stationary with respect to the movable electrode located on opposing sides of the movable electrode, and gaps provided between the movable electrode and the fixed electrodes. To prevent the movable electrode becoming fused to the contacted fixed electrode, in a first aspect of this invention, an insulating layer is provided between the movable electrode and fixed electrodes, the layer being either on the movable electrode or on the fixed electrodes and in a second aspect the movable electrode or, preferably, the fixed electrodes, are formed of a high melting point material. In such a second aspect, to improve adhesion between the high melting point material and a substrate to which the fixed electrodes are mounted, a lower melting point material is firstly coated on the substrates. A sensor detector unit processing circuit has the output characteristic of the circuit digitally adjusted by suitable switching of a plurality of resistors, and the sensor chip and the detector unit integrated circuit may be located on a common base and mounted in a hermetically sealed chamber to prevent adverse environmental effects affecting operation of the sensor and detector unit assembly. A gas having a dew point of -40.degree. C. or lower is, advantageously, charged into the hermetically sealed chamber.

Semiconductor acceleration sensor and vehicle control system using the

The present invention relates to a semiconductor device having an n-type semiconductor region forming one of the main surfaces of a semiconductor substrate, with a plurality of p-type semiconductor regions formed in the n-type semiconductor region. Two exposed n-type semiconductor regions are formed on each of the p-type semiconductor regions, with a main electrode formed on the n-type semiconductor regions and the exposed p-type semiconductor region therebetween. An insulated gate extends from one of the n-type semiconductor regions in one of the p-type semiconductor regions to a closer one of the n-type semiconductor regions in an adjacent p-type semiconductor region. The length of the insulated gate is longer than a distance between adjacent insulated gates.

Vertical insulated gate semiconductor device with less influence from

In a module using a high-speed switching element such as an IGBT for a high-speed inverter, a matching condition is established between the switching characteristic of the IGBT and the recovery characteristic of the diode to be connected thereto in an anti-parallel fashion. As a result, the oscillating voltage appearing in the inverter circuit is suppressed to prevent erroneous operation of the inverter system.

Parallel circuit module including a diode and an IGBT

An inverter includes first, second, and third dc voltage sources, first and second switching elements which are connected in series to the first dc voltage source, a signal generator section for producing first and second control signals on the basis of the output voltage from the third dc voltage source, first and second signal level converter sections for converting voltage levels of the first and second control signals based on the output voltage from the second dc voltage source and thereby respectively generating first and second output signals, and first and second driver sections responsive to the first and second output signals for supplying the first and second switching element with first and second driving signals on the basis of the output voltage from the second dc voltage source and thereby respectively turning the first and second switching elements on or off. At least either one of the first and second signal level converter sections includes a turn-off section responsive when at least either one of the output voltages respectively from the second and third dc voltage sources is lower than a predetermined voltage level for turning the first or second switching element off irrespective of the first and second control signals.

Inverter

A method for fabricating an insulated gate semiconductor device comprises the steps of forming insulated gates on an n.sup.- -layer surface, forming p-well layers in the n.sup.- -layer using the insulated gates as masks, forming phosphosilicate glass layers on the side walls of the insulated gates and diffusing the impurities from the phosphosilicate glass layers into the p-well layers to form n.sup.30 -source layer.

Method for fabricating insulated gate semiconductor device

A lateral insulated gate bipolar transistor comprises a p layer and a p.sup.+ layer provided apart from each other and extending from a surface of an n.sup.- layer into the n.sup.- layer, an n.sup.+ layer provided extending from a surface of the p layer into the p layer, a first main electrode provided in ohmic contact with the n.sup.+ layer and the p layer, a second main electrode provided in ohmic contact with the p.sup.+ layer, and a control electrode provided through an insulating film on the n.sup.+ layer, the p layer and the n.sup.- layer on the side of the first main electrode away from the second main electrode.

Lateral insulated gate bipolar transistor

A method for fabricating an insulated gate semiconductor device comprises the steps of forming insulated gates on an n.sup.- -layer surface, forming p-well layers in the n.sup.- -layer using the insulated gates as masks, forming phosphosilicate glass layers on the side walls of the insulated gates and diffusing the impurities from the phosphosilicate glass layers into the p-well layers to form n.sup.+ -source layer.

Disclosed is a composite semiconductor device which comprises: a second and a third semiconductor regions of a second conductivity type formed in a first semiconductor region of a first conductivity type independently of each other and so as to be exposed on one main surface of a semiconductor substrate; a fourth and a fifth semiconductor regions of the first conductivity type formed in the second semiconductor region independently of each other and so as to be exposed on the one main surface of the semiconductor substrate; a first insulated gate electrode formed on the second semiconductor region located between the fifth and first semiconductor regions and exposed on the one main surface; a second insulated gate electrode formed on the first semiconductor region located between the second and third semiconductor regions and exposed on the one main surface; an electrode which shorts the fourth and third semiconductor regions; another electrode which shorts the second and fifth semiconductor regions; and a further electrode provided in the first semiconductor region.

Composite semiconductor device

In a light-activated semiconductor device wherein a light-activated semiconductor element accommodated in a package is driven by a light signal fed from an external light source into the package through an optical guide, the optical guide comprises a first portion passing through the package and a second portion for optically coupling the first portion and the light-activated element.

Light-activated semiconductor device with optic fiber moveable

The whole body of a semiconductor device with its pn junction exposed ends covered by insulating glass is subjected to the exposure to radiation having an energy of higher than 0.5 MeV in terms of the reduced energy of electron beams while the semiconductor device is maintained at temperatures higher than 300.degree. C., and preferably higher than 350.degree. C. As a result, the life time of the minority carriers in the semiconductor device can be shortened without increasing the leakage current in the reverse direction.

Method of simultaneously controlling the lifetimes and leakage currents

Semiconductor devices with improved reverse characteristics are obtained by exposing the semiconductor bodies of the devices that are passivated by alkali-free glasses to a high energy radiation such as an electron radiation so as to shorten a life time of the bodies down to a predetermined value, while increasing the reverse leakage current of the bodies, and by subjecting the irradiated semiconductor bodies to an annealing treatment at a temperature of 250.degree. to 350.degree. C. for a sufficient time so as to decrease the reverse leakage current down to a predetermined value, while maintaining the order of the shortened life time.

Electron irradiation process of glass passivated semiconductor devices

A semiconductor switching device including at least three PN junctions and a control electrode formed on a portion of the surface of one outermost layer out of the layers constituting said PN junctions, wherein, in order to positively ensure that it turns off, the forward voltage drop across a current path including a portion of the outermost layer near the control electrode is made greater than that across the main current path.

Semiconductor switching device

A semiconductor device having a high blocking voltage, comprises a pair of principal surfaces opposite to each other, a circular groove cut in the peripheral portion of one of the principal surfaces and a PN junction formed along the surface of the groove and the one of the principal surfaces, wherein the region on the side of the PN junction near the one of the principal surfaces is of high impurity concentration, the outer edge of the PN junction appears in the bevel surface connecting the pair of principal surfaces, and the edge of the PN junction intersects the bevel surface in such a manner that the angle therebetween in the region of high impurity concentration is obtuse.

Semiconductor device having high blocking voltage with peripheral

A thyristor with a gate electrode formed on the side of an anode electrode. An auxiliary region of a large lateral resistance is formed in a surface layer of the substrate between the anode and gate electrodes.

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Hitachi, Japan

Tomoyuki Tanaka