Adv Antest Corporation

Tomoyuki Sugaya

Kiyoshi Murata

Sami Akhtar

Tatsuya Yamada

Hiroyasu Nakayama

To increase the overall efficiency of a test apparatus, provided is a test module that includes an instruction information storage section that stores instruction information indicating an order in which basic patterns are expanded; a basic pattern data storage section that stores basic pattern data; a plurality of pattern generating sections that each include a temporary instruction information storage section, which temporarily stores a portion of the instruction information, and that each generate a test pattern supplied to a device under test by expanding the basic pattern data in the order indicated by the instruction information stored in the corresponding temporary instruction information storage section; and a plurality of position information storage sections that independently store position information indicating reading positions of the instruction information stored in the instruction information storage section that is common to the plurality of pattern generating sections, in association with each pattern generating section.

Testing module, testing apparatus and testing method

A testing module including a designation information storing section that stores designation information designating an order of decoding fundamental patterns, a fundamental pattern storing section that stores the fundamental patterns, a plurality of pattern generating sections that each generate a test pattern to be supplied to a device under test, a plurality of position information storing sections that each store, in association with a corresponding pattern generating section, position information designating a read position from which the designation information is read from the designation information storing section, and an information transmission path shared by the pattern generating sections that transmits a part of the designation information from the designation information storing section to the designation information temporary storing section in each pattern generating section. Each pattern generating section decodes the fundamental patterns in an order designated by the partial designation information stored on the designation information temporary storing section.

Provided is test apparatus with higher testing efficiency, including: plurality of pattern generating sections generating test pattern to supply to devices under test; group control section controlling group of pattern generating sections out of the pattern generating sections, and generating control signal upon receiving signal output from any pattern generating section controlled; range information storage section storing range information indicating range of pattern generating sections, out of the pattern generating sections, that serve to test one independent device under test; and comprehensive control section receiving the control signal from the group control section, identifying any pattern generating section that supplies the test pattern to the same device under test as that to which the pattern generating section having output the signal supplies the test pattern based on the range information, and in response to the control signal, controlling any other group control section that controls the identified pattern generating section.

Testing apparatus and testing method

There is provided a test apparatus for testing a device under test. The test apparatus includes a main instruction storing section that stores thereon a main test instruction sequence, a sub instruction storing section that stores thereon a sub test instruction sequence which is executed when a subroutine call instruction included in the main test instruction sequence is executed, a pattern generating section that (i) sequentially reads and executes an instruction from the main test instruction sequence and outputs (I) a test pattern associated with the executed instruction and (II) timing set information designating a combination of timings for output of the test pattern, (ii) under a condition of executing the subroutine call instruction, sequentially reads and executes an instruction from the sub test instruction sequence designated by the executed subroutine call instruction and outputs (1) a test pattern associated with the executed instruction and (2) timing set information for a test pattern associated with the subroutine call instruction or an instruction which precedes the subroutine call instruction in the main test instruction sequence, and a test signal output section that generates a test signal in accordance with the test pattern, and supplies the test signal to the device under test at a timing designated by the timing set information.

Pattern generation for test apparatus and electronic device

A test apparatus that tests a device under test, including a main memory having an expectation pattern storing region storing an expectation pattern sequence to be sequentially compared with output patterns sequentially output from a terminal of the device; a test pattern outputting unit for sequentially inputting a plurality of test patterns into the device; a capture unit for sequentially acquiring the output patterns into an output pattern storing region on the main memory; a memory reading unit for reading an output pattern sequence consisting of the plurality of acquired output patterns and the expectation pattern sequence from the main memory when the acquisition process acquiring the output patterns into the output pattern storing region has been terminated; and an expectation comparing unit for comparing the read expectation pattern sequence and the output pattern sequence.

Growing community of inventors

Tokyo, Japan

Tomoyuki Sugaya