Motorola Corporation

Tomoyuki Okada

Anthony J Bogusz

Thomas C Sanchez

Steve G Friede

Robert Baranowski

Terrie L Frane

Dale F Medendorp

Terrie Lee Frane

Dale Frederick Medendorp

A combined radiotelephone and paging device (101), hereinafter the combined unit, normally operates as a radiotelephone. In response to a predetermined condition, the combined unit operates as a paging device. The predetermined conditions include low battery voltage and poor communication channel quality or a request signal from a remote transceiver (109) of the radiotelephone system. The paging system and the radiotelephone system may be independent communication systems or they may be a single communication system. The combined unit (101) and its unique switching characteristics allows the combined unit (101) to utilize the paging devices beneficial qualities of lower power consumption and broader service range to enhance the usefulness of a radiotelephone.

Method of operation a combination radiotelephone and paging device and

Method of operating a combination radiotelephone and paging device

A portable radiotelephone (101) operating in a radio communication system (100), the portable radiotelephone including power consumption controller circuitry (200). The radiotelephone system (100) is designed such that the portable radiotelephone (101) needs to only intermittently receive paging information from a remote transceiver (103) during a control mode. The power consumption controller circuitry (200) utilizes a low cost, low power, low frequency oscillator (237) in conjunction with hardware and software for shutting down a portion of the radiotelephone (101) for a sleep period, when the radiotelephone (101) is not receiving information from the remote transceiver (103). The current sleep period is adapted depending upon the timing accuracy of the previous sleep period.

Adaptive radio receiver controller method and apparatus

An error detector circuit and associated method for a digital receiver. The digital receiver is operative in a TDMA communication scheme in which DQPSK-modulated signals are generated, such as the Japanese Digital Cordless Telephone System. The error detector circuit detects times in which an excessive amount of noise or other distortion is introduced upon one or more sequences of a signal transmitted during one or more time slots in the TDMA communications scheme. A receiver incorporating the error detector circuit is operative not to decode portions of a received signal when excessive numbers of sequences include excessive amounts of noise or other distortion introduced thereupon. Thereby, degradation of the audio quality of a signal actually recreated by the receiver incorporating the error detector.

Error detector circuit and method therefor

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Palatine, IL, United States of America

Tomoyuki Okada