Kabushiki Kaisha Toshiba

Toshiba Memory Corporation

Tomoyuki Kantani

Hidetaka Tsuji

Masanobu Shirakawa

Yasuhiko Kurosawa

Tsuyoshi Atsumi

Hideaki Yamamoto

Hiroki Nishida

Yoshii Akagawa

According to one embodiment, a first string is coupled to the bit line via a first transistor and includes a first cell transistor. A second string is coupled to the bit line via a second transistor and includes a second cell transistor. The first and second cell transistors are coupled to the word line. A controller is configured to instruct the memory device to write first data to the first cell transistor and to write second data to the second cell transistor. The controller is further configured to instruct the memory device to read data from the first cell transistor while storing the first data and the second data after making the instruction for writing the first data and the second data.

Memory system

According to one embodiment, a memory system includes a nonvolatile semiconductor memory and a memory controller. The memory controller has a first signal generation section that generates a first signal related with a read voltage used for read operation of the nonvolatile semiconductor memory, a second signal generation section that generates a second signal that specifies the temperature coefficient used for the correction for temperature of the read voltage, and a first interface section that outputs the first signal, the second signal and a read command. The nonvolatile semiconductor memory has a word line, a memory cell array includes memory cells connected to the word line, and a second interface section that receives the first signal, the second signal and the read command.

Memory controller, nonvolatile semiconductor memory device and memory system

A semiconductor memory device includes a memory unit configured in page units, an error correction code (ECC) module for generating error correcting codes, a page information addition module for generating page information, and a controller for controlling the reading and writing of data to the memory unit. The controller is configured to associate error correction code information and page information with each frame unit of data written to the memory unit and to store the associated information with each frame unit. The controller is configured to output data to an external host in sizes less than one page unit, such as one frame unit.

Semiconductor memory device

Growing community of inventors

Fujisawa, Japan

Tomoyuki Kantani