Mitsubishi Electric Corporation

Mitsubishi Denki Kabushiki Kaisha

Tomoyuki Asada

Kazuya Yamamoto

Satoshi Suzuki

Miyo Miyashita

Teruyuki Shimura

Takayuki Matsuzuka

Akira Inoue

Hiroyuki Otsuka

Kenichi Horiguchi

Hitoshi Kurusu

Yoichi Nogami

Kosei Maemura

Takao Haruna

Jun Takaso

Daisuke Tsunami

Satoshi Miho

Kenji Mukai

Eri Fukuda

Shigeo Yamabe

A semiconductor device according to the invention of the present application includes a support, a semiconductor chip provided on the support and a die bond material for bonding a back surface of the semiconductor chip to the support, wherein a plurality of cutouts is formed at edges formed between the back surface and side surfaces of the semiconductor chip connected to the back surface, and the die bond material is provided integrally over the plurality of cutouts.

Semiconductor device

Reduction in impedance in a lead connected to a semiconductor element is achieved while achieving anchor effect. The semiconductor device includes a heatsink, a semiconductor element, a lead disposed on an upper side of the heatsink, and a molding material formed to cover the lead, the heatsink, and the semiconductor element. Formed on an edge portion of a lower surface in a position, in the heatsink, overlapping with the lead in a plan view is a first convex portion protruding more than an edge portion of an upper surface in the position, and formed on an edge portion of an upper surface in a position, in the heatsink, which does not overlap with the lead in a plan view is a second convex portion protruding more than an edge portion of a lower surface in the position.

Semiconductor device, high-frequency power amplifier, and method of manufacturing semiconductor device

A high frequency power amplifier includes an amplification element amplifying a high frequency signal; a duplexer to which an output signal of the amplification element is inputted, the duplexer allowing a signal of a certain frequency band to pass and attenuating signals of other frequency bands; a matching circuit connected between the amplification element and the duplexer; an external terminal connected to the matching circuit; and a passive element connected between the external terminal and a grounding point. The amplification element, the matching circuit, and the duplexer are integrally mounted on a single substrate. The passive element is located outside the substrate.

High frequency power amplifier

A detector circuit for detecting degradation in the distortion characteristics of a power amplifier based on signals from both ends of a coupled line of a directional coupler. The detector circuit includes a phase shifter/attenuator for phase shifting and attenuating a signal from a coupled terminal of the coupled line, a differential amplifier for outputting difference between an output signal from the phase shifter/attenuator and a signal from the isolated terminal of the coupled line, a wave detector circuit for converting the difference into a DC signal, and a comparing circuit for determining whether the voltage level of the DC signal exceeds a predetermined level. When degradation in the distortion characteristics of the power amplifier arises, the phase shifter/attenuator phase shifts the signal from the coupled terminal and outputs a signal 180&#xb0; out of phase with the signal from the isolated terminal.

Detector circuit and semiconductor device using same

A directional coupler includes capacitive elements electrically connected to a coupled port and an isolated port, respectively, for a coupled line on a chip (on-chip). The capacitive elements serve as matching capacitive elements and may be MIM (Metal Insulator Metal) capacitors on a substrate. A first end of a first of the capacitive elements is connected between the coupled port and the coupled line and a second end is grounded. A first end of a second of the capacitive elements is connected between the isolated port and the coupled line and a second end is grounded.

Directional coupler

A high frequency power amplifier includes first and second transistors connected in parallel and amplifying a high frequency signal; a first switch connected to outputs of the first and second transistors and which connects an input terminal selectively to first and second output terminals; a third transistor amplifying a signal output from the first output terminal of the first switch; and a second switch having a first input terminal connected to the third transistor, a second input terminal connected to the second output terminal of the first switch, and which selectively connects the first and the second input terminals to an output terminal of the second switch.

An emitter-follower bias circuit supplying a bias voltage to the base of an amplification transistor includes: a depletion mode FET boosting a reference voltage; and an emitter-follower circuit generating the bias voltage in response to the reference voltage boosted by the depletion mode FET.

Emitter-follower type bias circuit

A power amplifier according to the present invention is operated by switching a main power amplifier and a subsidiary power amplifier. The idle current of the subsidiary power amplifier is smaller than the idle current of the main power amplifier. Each of the main power amplifier and the subsidiary power amplifier has a former amplification element for amplifying RF signals, a latter amplification element for amplifying output signals from the former amplification element, a former bias circuit for driving the former amplification elements, and a latter bias circuit for driving the latter amplification elements, respectively. The interval between the latter amplification element of the main power amplifier and the latter amplification element of the subsidiary power amplifier is not more than 100 &#x3bc;m. The interval between the latter amplification element of the main power amplifier and the latter bias circuit of the subsidiary power amplifier is not less than 200 &#x3bc;m.

Power amplifier

A combined bias circuit in which a voltage drive bias circuit and a current drive bias circuit are provided in parallel with each other has a configuration in which a linearizer including a first resistor is connected between an amplifying transistor and a second resistor. This configuration ensures that even when a low voltage of 2.4 to 2.5 V is supplied as an external reference voltage, the amplifying operation can be performed while generally constantly maintaining an idling current in a temperature range from a low temperature to a high temperature, and that degradation in distortion characteristics during low-temperature operation can be limited.

Bias circuit for power amplifier having a low degradation in distortion characteristics

There are provided a power amplifying transistor, a bias circuit which supplies a bias current to the base of the power amplifying transistor, a current mirror circuit which detects a peak value of the collector voltage of the power amplifying transistor, and a control circuit which, when the peak value of the collector voltage becomes higher than a voltage set in advance, controls the bias circuit to increase the bias current.

Power amplifier and wireless communication device

Disclosed is an output overvoltage protection circuit for a power amplifier having a plurality of stages, which comprises a monitor circuit for monitoring an output overvoltage of an output transistor in the final stage of the power amplifier and allowing a current to flow therethrough in response to the monitored output overvoltage, and a current mirror circuit for supplying a current proportional to the current from the monitor circuit in such a manner that the base bias of the first-stage transistor of the power amplifier is reduced in response to the current supplied from the current mirror circuit, to reduce the output of the final-stage output transistor.

Output overvoltage protection circuit for power amplifier

A high-frequency power amplifier includes a semi-insulating GaAs substrate having disposed thereon an amplifying bipolar transistor, a bias circuit, a bias circuit output terminal connected to the bias circuit, and a base electrode connection terminal connected to the bipolar transistor; a chip inductor connected between the bias circuit output terminal and the base electrode connection terminal; and a mounting substrate on which both the semi-insulating GaAs substrate and the chip inductor are disposed, side by side.

High-frequency power amplifier

While minimizing any increase in chip size and without incurring a loss in performance or operating characteristic under normal operating voltage conditions, a power amplifier protection circuit effectively prevents breakdown of power amplifying transistors resulting from output load fluctuations during operation with an overvoltage supply. The protection circuit includes a gate circuit electrically connected between the collector and base of at least the last-stage transistor in a power amplifier including transistors connected in stages. The gate circuit passes a feedback current to the base electrode of the protected transistor when a voltage exceeding a specific level is applied to the collector of the protected transistor.

Growing community of inventors

Tokyo, Japan

Tomoyuki Asada