Sharp Kabushiki Kaisha Corporation

Tomoyo Maruyama

Yoshiki Sota

Hiroyuki Nakanishi

Toshiya Ishio

Katsunobu Mori

Hiroyuki Juso

Katsuyuki Tarui

A semiconductor device includes an insulative substrate having a layer of interconnection patterns formed on a chip-side surface and external terminals formed on the opposite surface, and a plurality of semiconductor chips stacked on the chip-side surface of the insulative substrate. In the semiconductor device, among the plurality of semiconductor chips, a semiconductor chip having the largest plan surface area has the greatest thickness.

Semiconductor device having a plurality of semiconductor chips

An insulation material and a wire pattern are provided on at least one of the surfaces of a die pad. Wires of the wire pattern are patterned in such a manner that at least one inner lead included in at least one of two lead groups is electrically connected to an electrode pad provided on the element forming surface of the semiconductor chip near the side edge other than the side edge opposing the lead group including the above particular inner lead, while at least one inner lead included in the other lead group is electrically connected to an electrode pad provided on the element forming surface of the semiconductor chip near the side edge other than the side edge opposing the other lead group. Accordingly, a multichip-1-package semiconductor device using any kind of semiconductor chip can be realized. Also, the costs of the semiconductor device are saved and the semiconductor device can be developed in a shorter period by omitting the design modification of the semiconductor chip.

Semiconductor device including a wire pattern for relaying connection

Growing community of inventors

Kitakatsuragi-gun, Japan

Tomoyo Maruyama