Shin-etsu Handotai Co., Ltd.

Tomosuke Yoshida

Masaro Tamatsuka

Ken Aihara

Ryoji Hoshi

Masatake Nakano

Takeshi Arai

Masahiro Kato

Yutaka Kitagawara

Hiroki Ose

Fumio Tahara

Akihiro Kimura

Satoshi Tobe

Fumitaka Kume

Taishi Wakabayashi

Kenji Meguro

Shinichiro Yagi

Naohisa Toda

Osamu Imai

Kenji Akiyama

A method for manufacturing a bonded SOI wafer by bonding a bond wafer and a base wafer, each composed of a silicon single crystal, via an insulator film, including the steps of: depositing a polycrystalline silicon layer on the bonding surface side of the base wafer, polishing a surface of the polycrystalline silicon layer, forming the insulator film on the bonding surface of the bond wafer, bonding the polished surface of the polycrystalline silicon layer of the base wafer and the bond wafer via the insulator film, and thinning the bonded bond wafer to form an SOI layer; As a result, it is possible to provide a method for manufacturing a bonded SOI wafer which can prevent single-crystallization of polycrystalline silicon while suppressing an increase of the warpage of a base wafer even when the polycrystalline silicon layer to function as a carrier trap layer is deposited sufficiently thick.

Method for manufacturing a bonded SOI wafer

A method for manufacturing a silicon epitaxial wafer, including vapor-phase growing a silicon single crystal thin film on a silicon single crystal substrate in a hydrogen atmosphere while supplying a source gas; and cooling a silicon epitaxial wafer having the formed silicon single crystal thin film by calculating a temperature at which a standard value or a process average value of concentration of an evaluation target impurity present in the silicon single crystal thin film coincides with solubility limit concentration of the evaluation target impurity and setting a cooling rate of the silicon epitaxial wafer after the film formation to be less than 20&#xb0; C./sec in a temperature range of at least plus or minus 50&#xb0; C. from the calculated temperature.

Method for manufacturing silicon epitaxial wafer

A silicon epitaxial layeris grown in vapor phase on a silicon single crystal substratemanufactured by the Czochralski method, and doped with boron so as to adjust the resistivity to 0.02 &#x3a9;&#xb7;cm or below, oxygen precipitation nucleiare formed in the silicon single crystal substrate, by carrying out annealing at 450&#xb0; C. to 750&#xb0; C., in an oxidizing atmosphere, for a duration of time allowing formation of a silicon oxide film only to as thick as 2 nm or below on the silicon epitaxial layeras a result of the annealing, and thus-formed silicon oxide filmis etched as the first cleaning after the low-temperature annealing, using a cleaning solution. By this process, the final residual thickness of the silicon oxide film can be suppressed only to a level equivalent to native oxide film, without relying upon the hydrofluoric acid cleaning.

Method of manufacturing silicon epitaxial wafer

A susceptor () supporting a semiconductor substrate (W) in a vapor phase growth, wherein a pocket () is formed on an upper surface of the susceptor to arrange the semiconductor substrate (W) inside thereof. The pocket () has a two-stage structure having an upper stage pocket () for supporting an outer peripheral edge portion of the semiconductor substrate (W) and a lower stage pocket () formed on a lower stage of a center side from the upper stage pocket (). A hole () penetrated to a rear surface of the susceptor and opened in the vapor phase growth is formed in the lower stage pocket ().

Susceptor, vapor phase growth apparatus, epitaxial wafer manufacturing apparatus, epitaxial wafer manufacturing method, and epitaxial wafer

The present invention provides a CZ silicon wafer, wherein the wafer includes rod-like void defects and/or plate-like void defects inside thereof, and a CZ silicon wafer, wherein the silicon wafer includes void defects inside the wafer, a maximum value of a ratio between long side length L and short side length L (L /L ) in an optional rectangle circumscribed the void defect image projected on an optional &lcub;110&rcub; plane is 2.5 or more, and the silicon wafer including rod-like void defects and/or plate-like void defects inside the wafer, wherein a void defect density of the silicon wafer at a depth of from the wafer surface to at least 0.5 &mgr;m after the heat treatment is &frac12; or less than that of inside the wafer. According to this, the silicon wafer, which is suitable for expanding reducing effect of void defects by heat treatment up to a deeper region, can be obtained.

Silicon wafer

There is disclosed a method for producing an epitaxial silicon single crystal wafer comprising the steps of growing a silicon single crystal ingot wherein nitrogen is doped by Czochralski method, slicing the silicon single crystal ingot to provide a silicon single crystal wafer, and forming an epitaxial layer in the surface layer portion of the silicon single crystal wafer. There can be manufactured easily and in high productivity an epitaxial silicon monocrystal wafer which has high gettering capability when a substrate having a low boron concentration is used, a low concentration of heavy metal impurity, and an excellent crystallinity.

Method for producing an epitaxial silicon single crystal wafer and the

A method and apparatus for evaluating an oxygen concentration in a semiconductor silicon single crystal highly doped with boron at a low cost with a high sensitivity and high reproducibility. The single crystal, which is doped with boron of a high concentration of 10.sup.17 atoms/cm.sup.3 or higher, is irradiated with a light having a greater energy than that of bandgap of the semiconductor silicon while holding the single crystal at a temperature of room temperature to 50 K and photoluminescence intensities in the vicinity of a photon energy of 0.96 eV of a photoluminescence spectrum emitted from the single crystal under the above irradiation are measured to evaluate an oxygen concentration in the single crystal.

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Annaka, Japan

Tomosuke Yoshida