Tessera Interconnect Materials, Inc.

North Corporation

Adeia Semiconductor Bonding Technologies Inc.

Other

Sony Chemical & Information Device Corporation

Fuji Machinery Co., Ltd.

Cattleya Music Co., Ltd.

Tomoo Iijima

Masayuki Ohsawa

Yoshitaka Fukuoka

Hidetoshi Kusano

Kimitaka Endo

Kenji Oosawa

Kazuhiro Shimizu

Masanobu Yagi

Yukio Hashimoto

Kenichiro Hanamura

Mitsuyuki Takayasu

Kiyoe Nagai

Shigeo Hirade

Teruyuki Fujita

Yoshiko Saito

Kiyoshi Hyodo

Hideki Kotake

Inetaro Kurosawa

Toku Yoshino

Masayuki Oosawa

An electronic assembly is disclosed that includes a flexible insulating film, a semiconductor component that has a thickness of less than 50 micrometers, a conductive interconnect extending through the flexible insulating film, a second patterned metal wiring film adjacent, and a third patterned metal wiring film. The second patterned metal wiring film is electrically coupled with the third patterned metal wiring film through the conductive interconnect. The semiconductor component is coupled to the first patterned metal wiring film and at least one of the second patterned metal wiring film or the third patterned metal wiring film.

Multilayer wiring board for an electronic device

An interconnect element is provided. A monolithic dielectric element has a first exposed major surface, a plurality of first recesses extending inwardly from the first major surface, and a second exposed major surface remote from the first major surface, a plurality of second recesses extending inwardly from the second major surface. A plurality of first metal interconnect patterns are embedded in the plurality of first recesses and extend in one or more directions along the first major surface. A plurality of second metal interconnect patterns are embedded in the plurality of second recesses and extend in one or more directions along the second major surface. A plurality of non-hollow metal posts extend through the dielectric element between at least some of the plurality of first metal interconnect patterns and at least some of the plurality of second metal interconnect patterns.

Structure and method of making interconnect element having metal traces embedded in surface of dielectric

A process for manufacturing a multilayer wiring board including the steps of forming an insulating layer on a base provided with a bump for interlayer connection, bonding a copper foil onto the insulating layer by a thermocompression bonding by sandwiching the copper foil between stainless steel plates, and patterning the copper foil, in which a metal foil is interposed at least between each of the stainless plates and the copper foil at the time of the thermocompression bonding. At this time, a mold release layer is formed on a surface of the metal foil to be imposed. Thus, such a multilayer wiring board can be manufactured that prevents sticking of a product after molding (cementing of the copper foil) and excels in dimensional stability without occurrence of wrinkling and ruggedness.

Method for manufacturing multilayer wiring board

A method of making a microelectronic assembly includes providing a conductive metal layer having a first surface and a second surface, and etching the first surface of the conductive metal layer to form conductive protrusions, whereby after the etching step, the second surface of the conductive metal layer defines a substantially flat, continuous surface. The method includes juxtaposing a layer of an insulating material with tips of the conductive protrusions, and pressing the conductive protrusions through the layer of an insulating material so that the tips of the conductive protrusions are accessible at a first surface of the layer of an insulating material.

Methods of making microelectronic assemblies

A method of making a microelectronic element includes making a connection component by providing a metal layer having a top surface and a bottom surface, providing a dielectric layer over the top surface of the metal layer and forming openings in the dielectric layer to expose portions of the top surface of the metal layer. The method includes providing conductive elements atop the dielectric layer, at least some of the conductive elements extending through the openings in the dielectric layer and being in contact with the metal layer, and plating first conductive protrusions atop the at least some of the conductive elements extending through the openings in the dielectric layer, the first conductive protrusions extending away from the metal layer. The method includes selectively removing portions of the metal layer from the bottom surface of the metal layer to form second conductive protrusions that extend away from the first conductive protrusions. At least some of the first and second conductive protrusions are electrically interconnected with one another.

Manufacturing method for wiring circuit substrate

A multilayer wiring board includes a first insulating film and a first patterned metal wiring film extending along a first major surface thereof, and a second insulating film a second patterned metal wiring film extending along a second major surface thereof. The wiring board includes solid metal interconnects connecting the first patterned metal wiring film to the second patterned metal wiring film, the interconnects extending through at least one of the first and second insulating films, and a microelectronic element disposed between the first and second patterned wiring films, the microelectronic element having bond pads conductively connected to the first patterned metal wiring films. The wiring board also includes a plurality of external contacts exposed at one or more external surfaces of the multilayer wiring board, the contacts being conductively connected to at least one of the first and second patterned metal wiring films.

To provide a multilayer wiring board mainly used for an electronic device, in which a bump passing through an interlayer insulating film allows for interlayer connection between plural wiring films insulated from one another with plural interlayer insulating layers. In the multilayer wiring board, a circuit element such as an electronic part, a semiconductor chip, or a passive element is accommodated in the interlayer insulating films so as to connect its terminal with the corresponding wiring film. In particular, the semiconductor chip is polished to a thickness of 50 &#x3bc;m or smaller, and the multilayer wiring board itself for the electronic device has the flexibility.

A connecting member between wiring films is provided in which: a normal copper foil, which is a general-purpose component and not expensive, or the like can be used as a material; formation of bumps is sufficiently achieved by conducting etching one time; and a necessary number of layers can be laminated and pressed collectively at a time. Bumps, which are formed approximately in a cone-shape, for connecting wiring films of a multilayer wiring substrate are embedded in a second resin film that serves as an interlayer insulating film.

Connecting member between wiring films, manufacturing method thereof, and manufacturing method of multilayer wiring substrate

A method is provided for manufacturing a multi-layer wiring circuit substrate. A first metal layer is selectively etched in first areas to reduce a thickness of the metal layer in the first areas and to form protrusions in other areas which extend above the etched areas. An interlayer-insulating layer is formed to overlie the etched areas of the first metal layer. The interlayer-insulating layer has an inner surface which confronts the etched first areas and an outer surface remote from the inner surface, such that the protrusions extend through the interlayer-insulating layer and have ends exposed at the outer surface. A second metal layer is then provided in conductive communication with the exposed ends of the protrusions, and the first and second metal layers are selectively patterned from surfaces remote from the interlayer-insulating layer.

The present invention prepares a member having a conductor-circuit-forming copper foil formed on a protrusion-forming copper layer via an etching-barrier layer formed of a different metal. Etching is selectively performed for the protrusion-forming copper foil by using etchant that does not etch the etching-barrier layer, and protrusions are thereby formed. Then, the etching-barrier layer is removed using etchant that does not etch the copper foil and using the protrusions as masks. An interlayer-insulating layer is formed on a surface of the copper foil, on which the protrusions are formed, so that the protrusions are connected to the conductor circuit. Thereby, heights of the protrusions are uniformed, and the reliability of connections can be improved.

Manufacturing method for wiring circuit substrates

The present invention relates to a method for fabricating a wiring substrate by forming an insulating film on a metal base having openings on the metal base at positions corresponding to metal bumps to be formed later; forming at least one layer of wiring on the base made of a metal through the insulating film, the layer of wiring having a wring film formed thereon by electroplating; and selectively etching the base. The insulating film can be a liquid photosensitive polyamide, the wiring layer can be copper and the wiring film can be a conductive layer selected from the group consisting of Ni-P and Ni. In the present invention, the wiring layer can be formed through the insulating film in contact with the metal base at the openings in the insulating film and in contact with the insulating film where there are no openings in the insulating film.

Method for fabricating a wiring substrate by electroplating a wiring film on a metal base

The present invention prepares a member having a potrusion-forming copper foil formed on a conductor-circuit-forming copper layer via an etching-barrier layer formed of a different metal. Etching is selectively performed for the protrusion-forming copper foil by using etchant that does not etch the etching-barrier layer, and protrusions are thereby formed. Then, the etching-barrier layer is removed using etchant that does not etch the copper foil and using the protrusions as masks. An interlayer-insulating layer is formed on a surface of the copper foil , on which the protrusions are formed, so that the protrusions are connected to the conductor circuit. Thereby, heights of the protrusions are uniformed, and the reliability of connections can be improved.

Wiring circuit substrate and manufacturing method therefor

By adopting an electrolytic plating method in forming the bump, the drawbacks of the conventional electrolytic plating method should be avoided. For example, the necessity of adopting a lead wiring for each wiring or the like should be eliminated. On the surface of a metal base, a resist film (first resist film) having a negative pattern for forming a wiring film and a resist film (second resist film) having a negative pattern for forming the bump or the pad is formed. By using these films as masks, electrolytic plating of a bump material film is conducted to form the bump. Subsequently, after only the second film is removed. By using the first resist film as a mask, electrolytic plating is then conducted to form a wiring film.

Growing community of inventors

Tokyo, Japan

Tomoo Iijima