Sanken Electric Co., Ltd.

Kyocera Document Solutions Inc.

Tomonori Hotate

Hiroshi Shikauchi

Yuki Tanaka

Hiromichi Kumakura

Ryohei Baba

Satoru Washiya

Youhei Ohno

Hiroko Kawaguchi

Toru Yoshie

Shinji Kudoh

A semiconductor wafer and a method for forming a semiconductor. The semiconductor wafer includes: a first semiconductor component having a first device; a second semiconductor component having a second device; an insulation layer laterally extending to the first semiconductor component and the second semiconductor component; and a grind layer configured on or adjacent to a backside of the semiconductor wafer. Therefore, chipping or cracking can be decreased or avoided when the grind layer is exposed during the thinning process (such as backside grinding).

Semiconductor wafer and method for forming semiconductor

A semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes a silicon carbide substrate and a protective film covering at least partly a main surface of the silicon carbide substrate and one or more side surfaces of the silicon carbide substrate. Therefore, contact of the side surface of the silicon carbide substrate with the moisture gathering material may be avoided, and the breakdown behavior and the long-term reliability of the semiconductor device may be further improved.

Semiconductor device and method for manufacturing the semiconductor device

A semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes a silicon carbide drift layer, a buried silicon carbide layer and an oxide semiconductor layer; the buried silicon carbide layer is located within the silicon carbide drift layer and the buried silicon carbide layer is covered by the oxide semiconductor layer. Therefore, breakdown behavior and/or long-time reliability of the semiconductor device may be further improved.

Provided is a highly reliable semiconductor device that uses a thick passivation layer. The protective film is formed so as to cover mostly the entire surface of a semiconductor substrate, and is open only in an area of part that is above a metal wiring layer (connection area). The passivation layer includes starting from the bottom side, a first silicon nitride film that includes silicon nitride (SiN), a silicon oxide film that includes silicon oxide (SiO), and an organic film (organic layer) that includes a polyimide. The silicon oxide film and organic film are formed so as to cover the electrode layer (metal wiring layer) except the top of the insulation layer and the connection area, however, the first silicon nitride film is formed only on the insulation layer and not formed on the electrode layer.

Semiconductor device

A semiconductor device includes a semiconductor substrate, which includes: a drift region that has a first conductivity type; a body region that has a second conductivity type and is formed on the drift region; and an impurity region that has the first conductivity type and is formed inward from a surface of the body region. The semiconductor device further includes a trench, which is formed on a front surface of the semiconductor substrate and reaches the drift region; a control electrode, which is formed in the trench; an oxide film, which is formed between an inner wall of the trench and the control electrode; an electrode, which is connected to the impurity region; and a transistor, which includes a nitride film formed on the front surface of the semiconductor substrate excluding an upper side of the control electrode and a formation position of the electrode, in the semiconductor substrate.

Semiconductor device with a gate insulating film formed on an inner wall of a trench, and method of manufacturing the same

A semiconductor device includes a semiconductor base body having a first main surface and a second main surface, the first main surface and the second main surface being opposite with each other; a Schottky electrode that is disposed on the first main surface and forms a Schottky junction with the semiconductor base body; and a barrier metal layer that is brought into ohmic contact with the first main surface around the Schottky electrode and covers a side surface of the Schottky electrode.

A semiconductor device of trench gate type is provided that has achieved both large on-current and high off-state breakdown voltage. Around trench T and between it and electric field relaxation p-layer, low resistance n-layeris provided. Low resistance n-layeris formed deeper than trench T, and shallower than electric field relaxation p-layer, being connected to n-layer (drift layer)just thereunder, and thus low resistance n-layerand n-layerare integrated to form a drift layer. Although low resistance n-layeris n-type as is n-layer, donor concentration thereof is set higher than that of n-layer, thereby low resistance n-layerhaving a resistivity lower than that of n-layer. This low resistance n-layeris provided in on-current path (between electric field relaxation p-layerand trench T), whereby low resistance n-layercan lower the resistance to on-current.

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Saitama, Japan

Tomonori Hotate