Panasonic Intellectual Property Management Co., Ltd.

Tomonari Ota

Kazuma Yoshida

Ryosuke Okawa

Takeshi Imamura

Toshikazu Imai

Eiji Yasuda

Shigetoshi Sota

Masaaki Hirako

Dohwan Ahn

A semiconductor device in chip size package includes first and second metal oxide semiconductor transistors both vertical transistors formed in first and second regions obtained by dividing the semiconductor device into halves. The first metal oxide semiconductor transistor includes one or more first gate electrodes and four or more first source electrodes provided in one major surface, each of the first gate electrodes is surrounded, in top view, by the first source electrodes, and for any combination of a first gate electrode and a first source electrode, closest points between the first gate and first source electrodes are on a line inclined to a chip side. The second metal oxide semiconductor transistor includes the same structure as the first metal oxide semiconductor transistor. A conductor that connects the drains of the first and second metal oxide semiconductor transistors is provided in the other major surface of the semiconductor device.

Semiconductor device including first and second metal oxide semiconductor transistors

Growing community of inventors

Osaka, Japan

Tomonari Ota