Kabushiki Kaisha Toshiba

Mitsubishi Heavy Industries Limited

Tomohisa Kimura

Kenichi Amma

Tetsuro Itakura

Akira Yasuda

Kazuhide Abe

Takeshi Shima

Makiko Okumura

Nobuhiko Fukuda

Hidenori Takasugi

Katuhito Yamamoto

Yoshiharu Fuse

Mamoru Osawa

The circuit simulating method according to an embodiment includes obtaining a first electrical characteristic value of a circuit element that operates under a predetermined operational condition. The circuit simulating method includes correcting the first electrical characteristic value based on a period in which application of an electrical stress equal to or higher than a reference value is stopped during operation of the circuit element.

Circuit simulating method, circuit simulating apparatus, and method of manufacturing semiconductor device

A power receiving device includes: a plurality of antennas, a plurality of rectenna rectifying circuits each of which is provided to correspond to each of the antennas and each of which converts electromagnetic waves received by the corresponding antenna into DC power and outputs the DC power; a connection switching circuit which is provided between the plurality of rectenna rectifying circuits and a load and which performs switching between serial/parallel connection states of the output side of the plurality of rectenna rectifying circuits; a current sensor which measures current flowing through the load; and a control section which, on the basis of the current measured by the current sensor, selects a serial/parallel connection state of the rectenna rectifying circuits, the state enabling the RF-DC conversion efficiency to be maximized, and which controls the connection switching circuit so that the rectenna rectifying circuits is in the selected serial/parallel connection state.

Power receiving device and wireless power transmission system

A simulation device having an ESD (Electro Static Discharge) protection element has a first parameter file creating unit, a second parameter file creating unit, a parameter file storage storing the parameter files created by the first and second parameter file creating units, a parameter file selector changing a parameter file to be selected from the parameter files stored in the parameter file storage, depending on whether or not operation of the ESD protection element should be verified, a netlist creating unit creating a netlist of the semiconductor circuit utilizing the parameter file selected by the parameter file selector, and a simulation executing unit verifying the operation of the semiconductor circuit based on the netlist.

Simulation device and simulation method

It is desired to provide a wireless power transmission system which it is possible to more surely prevent the leakage of a microwave. A wireless power transmission system includes: a power transmission antenna configured to output a microwave from an output plane; a power reception antenna arranged in a position opposing to said output plane of said power transmission antenna in power transmission and configured to receive the microwave outputted from said power transmission antenna by an input plane; and a shield section configured to electromagnetically shield a space between said power transmission antenna and said power reception antenna from an external space by a plurality of outer circumference coil springs provided in an area which surrounds said output plane of said power transmission antenna. The coil spring bends along a convex section compared with a wire member when there is the convex section in a hit part. Therefore, good electromagnetic wave shield efficiency is obtained.

Wireless power transmission system

A semiconductor device analyzer has a substrate model reading module, a Y-matrix entry module, a discriminating module, a matrix reduction module, and an output format discriminating module. The substrate model reading module reads a substrate network model of three-dimensional meshes representing the substrate of a semiconductor device. The substrate network model is a network of resistive and capacitive elements and is used for the simulation and analysis of the semiconductor substrate. The Y-matrix entry module prepares a Y-matrix from the substrate network model, each element of the Y-matrix being expressed with a polynomial of differential operator 's'. The discriminating module discriminates internal nodes to be eliminated from external nodes to be left among the nodes of the substrate network model. The matrix reduction module eliminates the internal nodes, thereby reducing the Y-matrix. The output format determining module determines an output format for an operation result.

Semiconductor device analyzer, method for analyzing/manufacturing semiconductor device, and storage medium storing program for analyzing semiconductor device

An analog/digital converter apparatus includes a reference signal generator circuit for generating a reference signal, a comparator section for determining a relationship in level between an input analog signal and the reference signal, and an encoder for converting a comparison result of the comparator section into a digital signal as an output signal. The comparator section has a comparator for comparing the input analog signal with the reference signal and a switching circuit which is interposed between the comparator and each of an input terminal for the input analog signal and a reference signal output terminal for the reference signal and used for switching the input signal lines of the comparator to compensate an equivalent input offset.

Analog/digital converter apparatus

A neural network apparatus includes a neural network including at least two neuron layers each having a plurality of neurons and at least one synapse layer having a plurality of synapses each arranged between the neuron layers, each synapse storing a weight value between the neurons and multiplying the weight value with an output value from each of the neurons in the previous-stage neuron layer to output a product to the next-stage neuron layer, a section for causing an error signal between an output from the neural network and a desired output to back-propagate from an output-side neuron layer to an input-side neuron layer of the neural network, a learning control section for updating the weight value in the synapse on the basis of the error signal and the output value from the previous-stage neuron, and a selecting section for selecting a synapse whose weight value is to be updated by the learning control section when the learning control section is to update the weight values of a predetermined number of synapses in a predetermined order.

Neural network apparatus and learning method thereof

An operational amplifier circuit includes a differential amplifier having an inverting input, a non-inverting input, and first and second outputs. The differential amplifier is fed by a current source coupled to a power supply voltage. An active load circuit is coupled to the first and second outputs of the differential amplifier and to a ground potential. An additional transistor is provided having a first current-carrying electrode coupled to the first output of the differential amplifier, a second current-carrying electrode coupled to the active load circuit, and an insulated gate electrode coupled to the active load circuit and the second output of the differential amplifier. An inversion amplifier has an input coupled to the second current-carrying electrode of the transistor, and an output, which is fed back through a compensation capacitor to the first output of the differential amplifier.

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Tokyo, Japan

Tomohisa Kimura