Other

Mitsubishi Denki Kabushiki Kaisha

Mitsubishi Electric Semiconductor Software Corporation

Tomohisa Iba

Kunio Tani

Hiroyuki Kimura

Makoto Yamamoto

Tsutomu Tanaka

Katsunobu Hongo

Kiyohiko Sakakibara

Susumu Takeuchi

Toshihiro Sezaki

Mikio Kamiya

Yukio Nakamoto

Tetsu Tashiro

Yasuhiro Ami

Tatsuki Furusho

A microcomputer comprises: a flash memory for storing rewriting control F/W and user S/F; a command register for specifying content of rewriting control; a address register to be subjected to rewriting-control; a data register for specifying data to be written; a power-supply pump circuit in the flash memory; and a control signal register for specifying/outputting a control signal to a memory decoder. A CPU of the microcomputer is capable of accessing these four registers to perform writing or reading. A given bit of the control signal register corresponds to a given control signal. A value written to the register becomes a control signal that will be directly supplied to both of the power supply circuit and the memory decoder, in the flash memory, to control them. By rewriting a set value of this control signal register using the rewriting control F/W according to a specified sequence, processing such as &ldquo;erase&rdquo; and &ldquo;program&rdquo; of the flash memory is performed. As a result, a layout area of an automatic sequence circuit is decreased, and a change in a sequence is also facilitated.

Microcomputer with built-in programmable nonvolatile memory

A nonvolatile semiconductor memory device selects a bit line while a word line is in a non-selected state, and self-selectively writes back only a cell in an overerased state on the selected bit line. The nonvolatile semiconductor memory device performs this write-back operation after completion of erase verification. At this time, current sensitivity of a sense current amplifier defining the threshold of a memory cell is set in view of an off-state leakage current of a memory cell transistor.

Nonvolatile semiconductor memory device capable of suppressing reduction of bit line potential in write-back operation and erase method

A nonvolatile semiconductor memory includes a memory block composed of a memory array having a plurality of memory cells arranged in a matrix form, each of the memory cells being composed of a nonvolatile transistor; a memory decoder necessary for erasing/writing/reading data of the nonvolatile transistor in the memory array; a charge pump necessary for erasing/writing/reading the data of the nonvolatile transistor in the memory array; a register having each of a plurality of control signals for controlling the memory decoder and the charge pump allocated to register 1 bit; and an updating device for updating a content of the register by a data processor coupled to the register. By using this updating device to update the content of the register, the memory decoder and the charge pump are controlled, the data of the memory block is erased, and data is written in/read from the nonvolatile transistor. Thus a selecting device other than a laser can be applied for suppressing the increase of an LSI circuit size in the same chip as that for a dedicated control circuit, verifying the disconnected state of a FUSE circuit in the memory, and trimming the FUSE circuit.

Nonvolatile semiconductor memory and automatic erasing/writing method thereof

According to a time required for programing operation, respective chips of flash memories are divided into a first group and a second group of chips requiring a time longer than the first group for the programing operation, and a postburn-in test, a high temperature test, and a low temperature test are carried out to a plurality of chips belonging to the first group simultaneously, and to a plurality of chips belonging to the second group simultaneously.

Method of testing flash memory

Growing community of inventors

Hyogo, Japan

Tomohisa Iba