Kabushiki Kaisha Toshiba

Toshiba Electronic Devices & Storage Corporation

Tomohiro Tamaki

Kazutoshi Nakamura

Ryohei Gejo

Norio Yasuhara

A semiconductor device includes a first semiconductor region of first conductivity type, a second semiconductor region of second conductivity type, a third semiconductor region of second conductivity type, a first electrode, a fourth semiconductor region of second conductivity type, a fifth semiconductor region of first conductivity type, a gate electrode, a sixth semiconductor region of second conductivity type, and second and third electrodes. The second and third semiconductor regions are formed below the first semiconductor region. A second conductivity type carrier concentration of the third semiconductor region is lower than that of the second semiconductor region. The gate electrode faces the fourth semiconductor region. The sixth semiconductor region is formed above the first semiconductor region and is located above the third semiconductor region. The second electrode is electrically connected to the third electrode and extends alongside the sixth semiconductor region with the first insulating layer interposed therebetween.

Semiconductor device

According to one embodiment, a semiconductor device a first electrode, a first semiconductor region, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a fifth semiconductor region, a sixth semiconductor region, a seventh semiconductor region, an eighth semiconductor region, a gate electrode, a ninth semiconductor region, and a second electrode. The first, second, and fourth semiconductor regions are provided on the first electrode. The third semiconductor region is provided between the first and second semiconductor regions. The fifth semiconductor region is provided on the first, second, third, and fourth semiconductor regions. The sixth and seventh semiconductor regions are provided on the fifth semiconductor region. The eighth semiconductor region is provided on a portion of the seventh semiconductor region. The ninth semiconductor region is provided around the sixth semiconductor region and the seventh semiconductor region. The ninth semiconductor region is positioned on the second semiconductor region.

A semiconductor device according to an embodiment includes a first diode portion including a first trench extending in a first direction, and a first trench electrode; a second diode portion adjacent to the first diode portion in the first direction and includes a second trench extending in the first direction, and a second trench electrode and of which the width in the first direction is greater than the width of the first diode portion in a second direction perpendicular to the first direction; and a first IGBT portion adjacent to the first diode portion in the second direction and is adjacent to the second diode portion in the first direction and includes a third trench extending in the first direction, and a first gate electrode.

Semiconductor device having IGBT portion and diode portion

A semiconductor device according to an embodiment includes a semiconductor layer having first and second planes; first and second electrodes; a first semiconductor region of a first conductivity type in the semiconductor layer; a second semiconductor region of a second conductivity type between the first semiconductor region and the first plane; and a third semiconductor region of the second conductivity type surrounding the second semiconductor region. The third semiconductor region includes a first region, a second region, and a third region. A first region, a second region, and a third region are closer to the second semiconductor region in this order. An amount of second-conductivity-type impurities in the first region, the second region, and the third region is less than that of the second semiconductor region. An amount of second-conductivity-type impurities in the second region is higher than that in the first region and the third region.

Semiconductor device having a triple region resurf structure

According to one embodiment, a semiconductor device includes a first electrode, first regions, second regions, an eighth semiconductor region, a ninth semiconductor region of the second conductivity type, a tenth semiconductor region, second electrodes, and a third electrode. Each first region includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, and a gate electrode. The first regions and the second regions alternate in the second direction. Each of the second regions includes a fifth semiconductor region, a sixth semiconductor region, and a seventh semiconductor region. The eighth semiconductor region is provided between the first semiconductor regions and between the fifth semiconductor regions. The eighth semiconductor region is electrically connected to the first semiconductor regions. The third electrode is provided on the tenth semiconductor region with a first insulating layer interposed. The third electrode is electrically connected to the gate electrodes.

Semiconductor device and method of manufacturing semiconductor device

A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a fourth semiconductor region of the first conductivity type, a fifth semiconductor region of the first conductivity type provided on the third semiconductor region and the fourth semiconductor region, and a sixth semiconductor region of the second conductivity type. The third semiconductor region is provided on the first semiconductor region and has a dopant concentration that is lower than a dopant concentration of the first semiconductor region. The fourth semiconductor region is provided on the second semiconductor region adjacent to the third semiconductor region. A dopant contained in the fourth semiconductor region extends to a level that is deeper than a level of a dopant contained in the third semiconductor region.

Growing community of inventors

Nonoichi Ishikawa, Japan

Tomohiro Tamaki