Fujitsu Corporation

Fujitsu Semiconductor Limited

Fujitsu Microelectronics Limited

Tomohiro Takamatsu

Ko Nakamura

Yoshimasa Horii

Aki Dote

Wensheng Wang

Junichi Watanabe

Kazuaki Takai

Masaki Kurasawa

Kenji Nomura

Naoyuki Sato

Katsuyoshi Matsuura

Mitsushi Fujiki

Jirou Miura

Fan Chu

Glen Richard Fox

Genichi Komuro

Yukinobu Hikosaka

Brian Lee Eastep

Hirotoshi Tachibana

Yoshinori Obata

Mitsuhiro Nakamura

There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3&#xb0; or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5&#xb0; or less, and a capacitor upper electrode.

Manufacturing method of a semiconductor device

A method for inspecting a semiconductor memory having nonvolatile memory cells using ferroelectric capacitors is disclosed which comprises, after shelf-aging the ferroelectric capacitor in a first polarized state, the steps of: (a) writing a second polarized state opposite to the first polarized state; (b) shelf-aging the ferroelectric capacitor in the second polarized state; and (c) reading the second polarized state. The temperature or voltage in the step (a) is lower than the temperature or voltage in the step (c). This method for inspecting a semiconductor memory enables to evaluate the imprint characteristics in a short time.

Inspection method for semiconductor memory

An upper electrode layer is processed into plural electrode shapes with lithography and subsequent dry etching to pattern plural upper electrodes, followed by conducting an RTA treatment at a treatment temperature of a value in a range from 400&#xb0; C. to 1000&#xb0; C. and at an oxygen flow volume of a value in a range from 0.1 L/min to 100 L/min and, subsequently, by conducting an annealing treatment at a treatment temperature of 650&#xb0; C. in an oxygen atmosphere for 60 minutes.

Semiconductor device and fabricating method thereof

Semiconductor device and manufacturing method of a semiconductor device

A ferroelectric capacitor including a bottom electrode (), a ferroelectric film () and a top electrode () is covered with an interlayer insulating film (). One end of the bottom electrode () is formed like comb teeth. To match with the remaining portion of that end, a plurality of contact holes () are formed in the interlayer insulating film (). In other words, gaps (notches) are formed in the bottom electrode () between lower ends of at least two of the contact holes (). And a wiring () connected to the bottom electrode () through the contact holes () is formed on the interlayer insulating film ().

Semiconductor device and manufacturing method thereof

An interlayer insulating film covering a ferroelectric capacitor is formed, and through the interlayer insulating film, contact holes each reaching a capacitor electrode are formed. A wiring connected to the capacitor electrode through the contact hole is further formed above the interlayer insulating film. A planar shape of the contact hole is a regular octagon, a regular rectangle with four angles thereof being rounded, an octagon with a length of each neighboring side thereof being different to each other, a circle, and so forth.

Semiconductor device with specifically shaped contact holes

A method for fabrication of ferroelectric capacitor elements of an integrated circuit includes steps of deposition of an electrically conductive bottom electrode layer, preferably made of a noble metal. The bottom electrode is covered with a layer of ferroelectric dielectric material. The ferroelectric dielectric is annealed with a first anneal prior to depositing a second electrode layer comprising a noble metal oxide. Deposition of the electrically conductive top electrode layer is followed by annealing the layer of ferroelectric dielectric material and the top electrode layer with a second anneal. The first and the second anneal are performed by rapid thermal annealing.

Process for producing high quality PZT films for ferroelectric memory integrated circuits

A method of fabricating a ferroelectric capacitor comprises the steps of forming an upper electrode on a ferroelectric film formed on a lower electrode by a sputtering process of a conductive oxide film, wherein the sputtering process is conducted by using a metal target under a first, oxidizing condition and a second, less oxidizing condition.

Ferroelectric capacitor with electrode formed in separate oxidizing conditions

A semiconductor device has a ferroelectric capacitor including a ferroelectric film provided on a lower electrode and an upper electrode provided on the ferroelectric film, wherein the upper electrode is formed of a first layer of a non-stoichiometric oxide and a second layer of a non-stoichiometric or stoichiometric oxide provided on the first layer, the second oxide having a composition closer to the stoichiometric composition as compared with the first layer.

Semiconductor device having a ferroelectric capacitor and fabrication process thereof

Growing community of inventors

Kawasaki, Japan

Tomohiro Takamatsu