Sandisk Technologies Inc.

Tomohiro Kubo

Fumiaki Toyama

Zhixin Cui

Shiqian Shao

Hirofumi Tokita

Raghuveer S Makala

Hiroyuki Ogawa

James K Kai

Rahul Sharangpani

George Matamis

Masanori Tsutsumi

Kiyohiko Sakakibara

Sateesh Koka

Kota Funayama

Shigehisa Inoue

Keisuke Izumi

Junichi Ariyoshi

Yuki Kasai

Masato Miyamoto

Koji Miyata

A semiconductor structure includes an alternating stack of insulating layers and electrically conductive layers, memory openings vertically extending through the alternating stack, memory opening fill structures including a vertical channel and memory elements located in the memory openings, a contact via cavity vertically extending through the alternating stack, and an integrated contact-and-support assembly located in the contact via cavity. The integrated contact-and-support assembly includes a dielectric support pillar and a conductive layer contact via structure electrically contacting a top surface of a first electrically conductive layer of the electrically conductive layers that surrounds the contact via cavity. A dielectric spacer is located in the contact via cavity, covering a sidewall of the first electrically conductive layer in the contact via cavity, and extending above the top surface of the first electrically conductive layer.

Three-dimensional memory device containing integrated contact-and-support assemblies and methods of making the same

A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, a first three-dimensional memory array located in a first memory array region, and a second three-dimensional memory array located in a second memory array region that is laterally spaced from the first memory array region along a first horizontal direction by an inter-array region. The alternating stack is laterally bounded by two trench fill structures that are laterally spaced apart along a second horizontal direction by an inter-trench spacing. The inter-array region includes a stepped cavity having vertical steps of the alternating stack that laterally extend along different horizontal directions. Multiple rows of contact via structures may contact different electrically conductive layers in the stepped cavity. Alternatively or additionally, a top portion of the stepped cavity and a width of a bridge region of the electrically conductive layers in the inter-array region may have a variable lateral extent along the second horizontal direction.

Three-dimensional memory device with high contact via density and methods of forming the same

A semiconductor structure includes an alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and including a vertical semiconductor channel, a memory film in contact with the vertical semiconductor channel, and a vertical stack of tubular dielectric spacers laterally surrounding the memory film. The tubular dielectric spacers may include tubular graded silicon oxynitride portions having a composition gradient such that an atomic concentration of nitrogen decreases with a lateral distance from an outer sidewall of the memory film, or may include tubular composite dielectric spacers including a respective tubular silicon oxide spacer and a respective tubular dielectric metal oxide spacer. Each of the electrically conductive layers has a hammerhead-shaped vertical cross-sectional profile.

Three-dimensional memory device including hammerhead-shaped word lines and methods of manufacturing the same

A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, memory openings vertically extending through each layer of the alternating stack; memory opening fill structures located in the memory openings, and a perforated wall structure including lateral openings at levels of the insulating layers.

Three-dimensional memory device with dielectric or semiconductor wall support structures and method of forming the same

A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located between line trenches, a first memory array region and a second memory array region, and a pair of dielectric wall structures located between the first line trench and the second line trench and between the memory array regions. Each layer within the alternating stack continuously extends between the first memory array region and the second memory array region in a connection region. The electrically conductive layers of the alternating stack have lateral extents that decrease with a distance from the substrate in a staircase region. Dielectric material plates interlaced with insulating plates or insulating layers are provided between the dielectric wall structures.

Three-dimensional memory device with dielectric wall support structures and method of forming the same

A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, first memory opening fill structures extending through the alternating stack, where each of the first memory opening fill structures includes a respective first drain region, a respective first memory film, a respective first vertical semiconductor channel contacting an inner sidewall of the respective first memory film, and a respective first dielectric core, and a drain-select-level isolation structure having a pair of straight lengthwise sidewalls that extend along a first horizontal direction and contact straight sidewalls of the first memory opening fill structures. Each first vertical semiconductor channel includes a tubular section that underlies a horizontal plane including a bottom surface of the drain-select-level isolation structure and a semi-tubular section overlying the tubular section.

Three-dimensional memory device with drain-select-level isolation structures and method of making the same

A first memory film and a sacrificial fill structure are formed within each first-tier memory opening through a first alternating stack of first insulating layers and first spacer material layers. A second alternating stack of second insulating layers and second spacer material layers is formed over the first alternating stack, and a second-tier memory opening is formed over each sacrificial fill structure. A second memory film is formed in each upper opening, and the sacrificial fill structures are removed from underneath the second-tier memory openings to form memory openings. A semiconductor channel is formed on each vertically neighboring pair of a first memory film and a second memory film as a continuous layer. The first memory film is protected by the sacrificial fill structure during formation of the second-tier memory openings.

Three-dimensional memory device with reduced etch damage to memory films and methods of making the same

A three-dimensional memory device includes field effect transistors located on a substrate, lower metal interconnect structures embedded in first dielectric layers and located over the substrate, a source line located over the first dielectric layers, a stepped dielectric material portion located over the first dielectric layers and including stepped surfaces, an alternating stack of insulating layers and electrically conductive layers located over the source line and contacting the stepped surfaces of the stepped dielectric material portion, and memory stack structures extending through the alternating stack and including a memory film and a vertical semiconductor channel. A lateral extent of the stepped dielectric material portion decreases stepwise with a vertical distance from the substrate, and lateral extents of the electrically conductive layers increase with a vertical distance from the source line.

Three-dimensional memory device including inverted memory stack structures and methods of making the same

A contact via structure vertically extending through an alternating stack of insulating layers and electrically conductive layers is provided in a staircase region having stepped surfaces. The contact via structure is electrically isolated from each electrically conductive layer of the alternating stack except for an electrically conductive layer that directly underlies a horizontal interface of the stepped surfaces. A laterally-protruding portion of the contact via structure contacts an annular top surface of the electrically conductive layer. The electrical isolation can be provided by a ribbed insulating spacer that includes laterally-protruding annular rib regions at levels of the insulating layers, or can be provided by annular insulating spacers located at levels of the electrically conductive layers. The contact via structure can contact a top surface of an underlying metal interconnect structure that overlies a substrate to provide an electrically conductive path.

Three-dimensional memory device containing through-memory-level contact via structures

Resistance of a semiconductor channel in three-dimensional memory stack structures can be reduced by forming a metal-semiconductor alloy region between a vertical semiconductor channel and a horizontal semiconductor channel located within a substrate. The metal-semiconductor alloy region can be formed by recessing a portion of the semiconductor material layer in the semiconductor substrate underneath a memory opening after formation of a memory film, selectively depositing a metallic material in the recess region, depositing a vertical semiconductor channel, and reacting the deposited metallic material with an adjacent portion of the semiconductor material layer and the vertical semiconductor channel. A sacrificial dielectric material layer can be formed on the memory film prior to the selective deposition of the metallic material. The vertical semiconductor channel can be formed in a single deposition process, thereby eliminating any interface therein and minimizing the resistance of the vertical semiconductor channel.

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Yokkaichi, Japan

Tomohiro Kubo