Denso Corporation

Tomoharu Hayakawa

Hitoshi Ishikawa

Tatsuya Aizawa

Hideki Kabune

Shigeo Uno

Nobuhiko Makino

Yu Takeuchi

Hiroyuki Morita

Masamitsu Ozeki

A motor control device is provided. In this motor control device, a first switching circuit group and a second switching circuit respectively provided between first and second microcomputers and first and second power converters receive drive signals generated by the microcomputers included in the own system and other drive signals generated by a microcomputer other than the microcomputers of the own system, select the own drive signal or the other drive signal according to selection signal from the microcomputers of the own system, and output the selected drive signal to the power converter of the own system. The first and second microcomputers output the selection signals to the switching circuit groups of the own system so as to select the own drive signal when the microcomputers are operating normally, and output the selection signal so as to select the other drive signal when a monitoring circuit of the system detects an faulty in the microcomputers.

Motor control device

A microcomputer includes: a CPU executing a predetermined calculation process; and a PWM timer generating a PWM pulse. The PWM timer includes a RAM for storing a duty value of the PWM pulse and a PWM controller for generating the PWM pulse. The PWM controller includes a PWM counter for counting up from a predetermined value as an initial value. The PWM pulse has an unit waveform, which is generated based on comparison between the duty value of the RAM and an output value of the PWM counter. The RAM outputs a new duty value at every comparison without functioning the CPU so that the duty value of the PWM pulse is changed in chronological order.

Microcomputer having CPU and PWM timer

An AD converter includes an input circuit, an operation circuit and a bus interface. The input circuit is provided with a pull-down circuit, which is capable of pulling down an analog signal input side of a sample-hold circuit whether an analog signal is inputted or not. The operation circuit is provided with a reference voltage conversion result storing register, which is capable of storing a conversion result of an analog reference voltage inputted periodically separately from a conversion result of the analog signal inputted through the sample-hold circuit. The operation circuit is further provided with a check register, which is capable of writing in and reading out data for checking operation of a signal transfer system including a bus interface through the bus interface. Thus, it is made possible to confirm normality of an external part and an internal part of the AD converter.

AD converter and data processing unit

Growing community of inventors

Kasugai, Japan

Tomoharu Hayakawa