Denso Corporation

Tomofusa Shiga

Takaaki Aoki

Yukio Tsuzuki

Yoshifumi Okabe

Hiromitsu Tanabe

Shoji Ozoe

Tetsuo Fujii

Shigeki Takahashi

Kenji Kouno

Shoji Mizuno

Masakiyo Sumitomo

Takeshi Fukazawa

Mikimasa Suzuki

Kimiharu Kayukawa

Masanori Miyata

A semiconductor device has an element part and an outer peripheral part, and a deep layer is formed in the outer peripheral part more deeply than a base layer. When a position of the deep layer closest to the element part is defined as a boundary position, a distance between the boundary position and a position closest to the outer peripheral part in an emitter region is defined as a first distance, and a distance between the boundary position and a position of an end of a collector layer is defined as a second distance, the first distance and the second distance are adjusted such that a carrier density in the outer peripheral part is lowered based on breakdown voltage in the outer peripheral part lowered by the deep layer.

Semiconductor device

A semiconductor device provides an element arrangement region on a semiconductor substrate including: a first semiconductor region on the semiconductor substrate; a second semiconductor region on the first semiconductor region; multiple trench gates penetrating the first semiconductor region and reaching the second semiconductor region; a third semiconductor region contacting the trench gate; a fourth semiconductor region on a rear surface; a first electrode connected to the first and second semiconductor regions; and a second electrode connected to the fourth semiconductor region. Each trench gate includes a main trench gate for generating a channel and a dummy trench gate for improving a withstand voltage of a component. The device further includes: a dummy gate wiring for applying a predetermined voltage to the dummy trench gate; and a dummy pad connected to the dummy gate wiring. The dummy pad and the first electrode are connected by a conductive member.

Semiconductor device and manufacturing method for the same

A semiconductor device includes: a semiconductor substrate; a vertical type trench gate MOS transistor; a Schottky barrier diode; multiple trenches having a stripe pattern to divide an inner region into first and second separation regions; and a poly silicon film in each trench. The first separation region includes a first conductive type region for providing a source and a second conductive type layer for providing a channel region. The first conductive type region is adjacent to a first trench. The poly silicon film in the first trench is coupled with a gate wiring. A second trench is not adjacent to the first conductive type region. The poly silicon film in the second trench is coupled with a source or gate wiring. The substrate in the second separation region is coupled with the source wiring for providing a Schottky barrier.

An insulated gate semiconductor device includes a first conductivity-type semiconductor substrate, a second conductivity-type base layer on a first surface side of the substrate, a trench dividing the base layer into channel and floating layers, and a first conductivity-type emitter region that is formed in the channel layer and in contact with the trench. The semiconductor device includes a gate insulation layer in the trench, a gate electrode on the insulation layer, an emitter electrode electrically connected to the emitter region and the floating layer, a second conductivity-type collector layer in the substrate, and a collector electrode on the collector layer. The floating layer has a lower impurity concentration than the channel layer. The floating layer has a first conductivity-type hole stopper layer located at a predetermined depth from the first surface of the substrate and at least partially spaced from the insulation layer.

Insulated gate semiconductor device

A semiconductor apparatus is provided. The semiconductor apparatus includes a semiconductor substrate and a temperature sensing diode that is disposed on a surface part of the semiconductor substrate. A relation between a forward current flowing through the temperature sensing diode and a corresponding voltage drop across the temperature sensing diode varies with temperature. The semiconductor apparatus further includes a capacitor that is coupled with the temperature sensing diode, configured to reduce noise to act on the temperature sensing diode, and disposed such that the capacitor and the temperature sensing diode have a layered structure in a thickness direction of the semiconductor substrate.

Semiconductor apparatus having temperature sensing diode

On the surface of a silicon nitride film, there is formed a thermal oxide film, over which a CVD oxide film is then formed to provide a silicon oxide film of two-layered structure films. Moreover, the total thickness of the two-layered structure films is set to a value from 5 nm to 30 nm. Thus, the silicon oxide film is made into the two-layered structure films of the thermal oxide film and the CVD oxide film to thereby achieve the thickness of the silicon oxide film. As a result, it is possible to prevent a Vth from being lowered by a charge trap phenomenon and to prevent the Vth from fluctuating due to the enlargement of the bird's beak length by the silicon oxide film.

Semiconductor device and method of manufacturing thereof

A vertical type semiconductor device includes: a silicon substrate having a first surface and a second surface; a first electrode disposed on the first surface of the silicon substrate; and a second electrode disposed on the second surface of the silicon substrate. Current is capable of flowing between the first electrode and the second electrode in a vertical direction of the silicon substrate. The second surface of the silicon substrate includes a re-crystallized silicon layer. The second electrode includes an aluminum film so that the aluminum film contacts the re-crystallized silicon layer with ohmic contact.

Vertical type semiconductor device and method for manufacturing the same

In a semiconductor device having a trench-gate structure in which polysilicon doped with boron is embedded in a trench, insulating film formed on the inner wall of the trench comprises ONO film, and silicon nitride film constituting the ONO film is formed to such film thickness and film quality that boron can be suppressed from passing through the silicon nitride film. Silicon oxide film is formed so that a top oxide film is thin and a bottom oxide film is thick.

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Nukata-gun, Japan

Tomofusa Shiga