Renesas Electronics Corporation

Nec Electronics Corporation

Nec Corporation

Tomoe Yamamoto

Toshihiro Iizuka

Shintaro Yamamichi

Mami Toda

Tomohisa Iino

Yoshitake Kato

Naomi Fukumaki

In a thin film transistor, each of an upper electrode and a lower electrode is formed of at least one material selected from the group consisting of a metal and a metal nitride, represented by TiN, Ti, W, WN, Pt, Ir, Ru. A capacitor dielectric film is formed of at least one material selected from the group consisting of ZrO, HfO, (Zr, Hf)O(0&#x3c;x&#x3c;1), (Zr, Ti)O(0&#x3c;y&#x3c;1), (Hf, Ti)O(0&#x3c;z&#x3c;1), (Zr, Ti, Hf)O(0&#x3c;k, l, m&#x3c;1, k+l+m=1), by an atomic layer deposition process. The thin film transistor thus formed has a minimized leakage current and an increased capacitance.

Method for fabricating a metal-insulator-metal (MIM) capacitor having capacitor dielectric layer formed by atomic layer deposition (ALD)

A vapor phase deposition apparatusfor forming a thin film comprising a chamber, a piping unitfor supplying a source material of the thin film into the chamberin a gaseous condition, a vaporizerfor vaporizing the source material in a source material containerand supplying the vaporized gas in the piping unitand a temperature control unit, is presented. The temperature control unitcomprises: a first temperature control unit, which is composed of a heater controller unitand a tape heaterand is capable of controlling the temperature of the first pipingin the piping unitthat is directly connected to the chamber; a second temperature control unit, which is composed of a heater controller unitand a tape heaterand is capable of controlling the temperature of the second pipingthat is connected to the vaporizer; and a third temperature control unit, which is composed of a heater controller unitand a thermostatic chamberand is capable of controlling the temperature of the valve

Vapor phase deposition apparatus, method for depositing thin film and method for manufacturing semiconductor device

In a thin film transistor, each of an upper electrode and a lower electrode is formed of at least one material selected from the group consisting of a metal and a metal nitride, represented by TiN, Ti, W, WN, Pt, Ir, Ru. A capacitor dielectric film is formed of at least one material selected from the group consisting of ZrO, HfO, (Zr, Hf)O(0&#x3c;x&#x3c;1), (Zr, Ti)O(0&#x3c;y&#x3c;1), (Hf, Ti)O(0&#x3c;z&#x3c;1), (Zr,Ti, Hf)O(0&#x3c;k, l, m&#x3c;1, k+l+m=1), by an atomic layer deposition process. The thin film transistor thus formed has a minimized leakage current and an increased capacitance.

Semiconductor device having a thin film capacitor of a MIM (metal-insulator-metal) structure

A semiconductor device having a logic section and a memory section that are formed on the same semiconductor chip, including: a first transistor formed in the logic section and having gate electrodes and source and drain regions, and a second transistor formed in the memory section having gate electrodes, source and drain regions and a capacitor, the capacitor being of a MIM structure and having an upper and a lower metal electrode and a capacitor dielectric film sandwiched therebetween, the capacitor dielectric film being formed of a dielectric material which is selected from the group consisting of ZrO2, Hf92, (Zrx, Hf1-x)O2 (0&#x3c;x&#x3c;1), (Zry, Ti1-y)o2 (0&#x3c;y&#x3c;1), (Hfz, Ti1-z)92 (0&#x3c;z&#x3c;1 and (Zrk, Til, Hfm)o2 (0&#x3c;k, l, m&#x3c;1, k+l+m&#x2212;1), wherein each of the first and second transistors has a refractory metal silicide layer formed over each of the source and drain regions thereof and the lower metal electrode is connected through a metal plug to the refractory metal silicide layer formed over one of the source and drain regions of the second transistor.

Metal-insulator-metal (MIM) capacitor having capacitor dielectric material selected from a group consisting of ZRO2, HFO2, (ZRX, HF1-X)O2 (0&#x3c;x&#x3c;1), (ZRy, Ti (O&#x3c;y&#x3c;1), (Hfz, Ti-z)O2 (O&#x3c;z&#x3c;1) and (Zrk, Ti1, Hfm)O2 (O&#x3c;K, 1, m&#x3c;1, K+1+m=1)

There is provided a semiconductor device comprising a dielectric film made of a high dielectric constant material, in which a leak current is reduced in the film and which exhibits improved device reliability. Specifically, a dielectric filmis a metal-compound film having a composition represented by the formula MOCNwherein x, y and z meet the conditions: 0&#x3c;x, 0.1&#x2266;y&#x2266;1.25, 0.01&#x2266;z and x+y+z=2; and M comprises at least Hf or Zr.

Process for manufacturing a semiconductor device comprising a metal-compound film

In the process for manufacturing a semiconductor device of the present invention, a capacitor dielectric film is deposited via an atomic layer deposition employing an organic source material containing one or more metallic element(s) selected from the group consisting of Zr, Hf, La and Y as a deposition gas. The process for manufacturing a capacitor of the present invention includes obtaining a boundary temperature T (degree C.), at which an increase in a deposition rate for depositing the capacitor dielectric film as increasing the temperature is detected, on the basis of a correlation data of a deposition temperature in the atomic layer deposition employing the deposition gas with a deposition rate for depositing the capacitor dielectric film at the deposition temperature (Sand S); and depositing the capacitor dielectric film via the atomic layer deposition employing the deposition gas at a temperature within a range of from (T&#x2212;20) (degree C.) to (T+20) (degree C.) (Sto S).

Method for manufacturing semiconductor device

A method for depositing a metal compound film on the wafer by using a vapor phase deposition apparatus, including: forming a thin film on the wafer in an interior of the vapor phase deposition apparatusby introducing a source gas for the metal compound film containing Hf or Zr; unloading the wafer having the metal compound film formed thereon from the interior of the vapor phase deposition apparatus; introducing a reactive gas in the interior of the vapor phase deposition apparatusto immobilize the unreacted organic compoundderived from the source gas remained in the interior of the vapor phase deposition apparatus; loading another wafer in the interior of the vapor phase deposition apparatus; and depositing metal compound film on another wafer by further introducing the source gas in the interior of the vapor phase deposition apparatus, in the condition that the unreacted organic compoundexists therein as an immobilized form, is presented.

Method for processing interior of vapor phase deposition apparatus, method for depositing thin film and method for manufacturing semiconductor device

A capacitor is provided that is optimal for use in DRAM and has high dielectric constant, and allows leakage current flowing therethrough to be maintained at a low level, and further, permits dependence of the leakage current on temperatures to be small. That is, capacitor openings are formed in an inter layer silicon oxide layer and a TiN film is patterned so that TiN films are left only within the openings to form lower electrodes within the openings. Subsequently, a Zr- and/or Hf-containing oxide film (represented by the formula, multicomponent Zr.sub.x.Hf.sub.1-x.O.sub.2 film (0&#x2266;x&#x2266;1)) formed from a metal-containing organic compound as a reactant and a Ti-containing oxide film are laminated to form capacitor dielectrics. After deposition of the Zr- and/or Hf-containing oxide film, the Zr- and/or Hf-containing oxide film is subjected to heat treatment to be performed in an oxidizing ambient to remove residual carbon being retained in the Zr- and/or Hf-containing oxide film, leading to formation of a capacitor that is optimal for use in DRAM and has high dielectric constant, and allows leakage current flowing therethrough to be maintained at a low level.

Method for forming capacitor

The method for fabricating a semiconductor device in accordance with the present invention has the steps of: forming a metal film as a lower electrode of a capacitor on a semiconductor substrate, followed by forming a capacity insulator film over the lower electrode by the ALCVD process; and forming an upper electrode of the capacitor on the capacity insulator film.

Method of fabricating a high dielectric constant metal oxide capacity insulator film using atomic layer CVD

When fabricating an MIM capacitive circuit in which a lower electrode and an upper electrode confront each other through a capacitive film, the lower electrode composed of titanium nitride (TiN), which is a metal that is resistant to oxidation by sulfuric acid, is formed on a substrate, following which the surface of this lower electrode is cleaned with a solution containing sulfuric acid, preferably, dilute sulfuric acid. A capacitive film composed of the dielectric material tantalum oxide (Ta Q ) is then formed on the surface of the cleaned lower electrode, following which an upper electrode composed of the metal titanium nitride (TiN) is formed on the surface of the capacitive film. Cleaning with dilute sulfuric acid eliminates the presence of organic material or oxide material on the surface of the lower electrode, thereby preventing leakage current that is caused by these materials.

Fabrication method for MIM capacitive circuit having little leakage current

A method of manufacturing a semiconductor memory cell is provided. The semiconductor memory cell can include a memory cell transistor ( ) and a capacitor. The capacitor can be formed in a groove ( ) formed in an interlayer insulation film ( ). The capacitor can have a lower electrode including a selective growth film ( ) which may be selectively deposited on a lower electrode film ( ). Selective growth film ( ) can be a ruthenium film having a thickness of approximately 5&tilde;10 nm and may serve as a buffer which may prevent lower electrode and a capacitor insulation film ( ) from deterioration in integrity which could cause increased leakage currents.

Growing community of inventors

Tokyo, Japan

Tomoe Yamamoto