Victor Company of Japan, Limited

Other

Sony Corporation

Tomoaki Suzuki

Kentaro Okuyama

Hideo Tanaka

Takayuki Tanaka

Takashi Itaya

Hiroshi Mizuno

Naomichi Nishimoto

Makoto Shinoda

Takeo Murayama

Masahiro Hirasawa

Haruko Sonpachi

A memory device is arranged in such a manner that an access-target memory cell is selected from a plurality of memory cells in accordance with the level of the byte-enable signal at the timing when the level of the corresponding row address strobe signal (/RAS signal) changes, and by this arrangement, the problem resided in the conventional memory device that it could not be decided as to whether a memory block in the DRAM core was to be a selected or non-selected byte until the fall of the corresponding column address strobe signal (/CAS signal), and thus the column decoder and the preamplifier that start operating at the fall of the /RAS signal could not be efficiently controlled is solved, and due to this, electric power that might otherwise be consumed at the time of executing a byte-unit access to the wide-bus DRAM can be reduced.

Memory device with reduced power consumption when byte-unit accessed

In a video signal recording apparatus, a first video signal is compressed into a second video signal in response to a controllable quantization factor which determines a degree of the compression. The quantization factor is controlled to maintain a data rate of the second video signal at substantially a constant rate. A detection is made as to a magnitude of the quantization factor. A decision is made as to whether or not the detected magnitude is greater than a predetermined reference magnitude. The second video signal is recorded on a recording medium when the detected magnitude is greater than the predetermined reference magnitude.

Video signal recording apparatus

Growing community of inventors

Tokyo, Japan

Tomoaki Suzuki